Thomas Gleixner

tglx@linutronix.de

Ingo Molnar

mingo@elte.hu

2005-2006 Thomas Gleixner 2005-2006 Ingo Molnar This documentation is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA For more details see the file COPYING in the source distribution of Linux. The generic interrupt handling layer is designed to provide a complete abstraction of interrupt handling for device drivers. It is able to handle all the different types of interrupt controller hardware. Device drivers use generic API functions to request, enable, disable and free interrupts. The drivers do not have to know anything about interrupt hardware details, so they can be used on different platforms without code changes. This documentation is provided to developers who want to implement an interrupt subsystem based for their architecture, with the help of the generic IRQ handling layer. The original implementation of interrupt handling in Linux is using the __do_IRQ() super-handler, which is able to deal with every type of interrupt logic. Originally, Russell King identified different types of handlers to build a quite universal set for the ARM interrupt handler implementation in Linux 2.5/2.6. He distinguished between: Level type Edge type Simple type In the SMP world of the __do_IRQ() super-handler another type was identified: Per CPU type This split implementation of highlevel IRQ handlers allows us to optimize the flow of the interrupt handling for each specific interrupt type. This reduces complexity in that particular codepath and allows the optimized handling of a given type. The original general IRQ implementation used hw_interrupt_type structures and their ->ack(), ->end() [etc.] callbacks to differentiate the flow control in the super-handler. This leads to a mix of flow logic and lowlevel hardware logic, and it also leads to unnecessary code duplication: for example in i386, there is a ioapic_level_irq and a ioapic_edge_irq irq-type which share many of the lowlevel details but have different flow handling. A more natural abstraction is the clean separation of the 'irq flow' and the 'chip details'. Analysing a couple of architecture's IRQ subsystem implementations reveals that most of them can use a generic set of 'irq flow' methods and only need to add the chip level specific code. The separation is also valuable for (sub)architectures which need specific quirks in the irq flow itself but not in the chip-details - and thus provides a more transparent IRQ subsystem design. Each interrupt descriptor is assigned its own highlevel flow handler, which is normally one of the generic implementations. (This highlevel flow handler implementation also makes it simple to provide demultiplexing handlers which can be found in embedded platforms on various architectures.) The separation makes the generic interrupt handling layer more flexible and extensible. For example, an (sub)architecture can use a generic irq-flow implementation for 'level type' interrupts and add a (sub)architecture specific 'edge type' implementation. To make the transition to the new model easier and prevent the breakage of existing implementations, the __do_IRQ() super-handler is still available. This leads to a kind of duality for the time being. Over time the new model should be used in more and more architectures, as it enables smaller and cleaner IRQ subsystems. None (knock on wood). There are three main levels of abstraction in the interrupt code: Highlevel driver API Highlevel IRQ flow handlers Chiplevel hardware encapsulation Each interrupt is described by an interrupt descriptor structure irq_desc. The interrupt is referenced by an 'unsigned int' numeric value which selects the corresponding interrupt decription structure in the descriptor structures array. The descriptor structure contains status information and pointers to the interrupt flow method and the interrupt chip structure which are assigned to this interrupt. Whenever an interrupt triggers, the lowlevel arch code calls into the generic interrupt code by calling desc->handle_irq(). This highlevel IRQ handling function only uses desc->chip primitives referenced by the assigned chip descriptor structure. The highlevel Driver API consists of following functions: request_irq() free_irq() disable_irq() enable_irq() disable_irq_nosync() (SMP only) synchronize_irq() (SMP only) set_irq_type() set_irq_wake() set_irq_data() set_irq_chip() set_irq_chip_data() See the autogenerated function documentation for details. The generic layer provides a set of pre-defined irq-flow methods: handle_level_irq handle_edge_irq handle_simple_irq handle_percpu_irq The interrupt flow handlers (either predefined or architecture specific) are assigned to specific interrupts by the architecture either during bootup or during device initialization. The helper functions call the chip primitives and are used by the default flow implementations. The following helper functions are implemented (simplified excerpt): default_enable(irq) { desc->chip->unmask(irq); } default_disable(irq) { if (!delay_disable(irq)) desc->chip->mask(irq); } default_ack(irq) { chip->ack(irq); } default_mask_ack(irq) { if (chip->mask_ack) { chip->mask_ack(irq); } else { chip->mask(irq); chip->ack(irq); } } noop(irq) { } handle_level_irq provides a generic implementation for level-triggered interrupts. The following control flow is implemented (simplified excerpt): desc->chip->start(); handle_IRQ_event(desc->action); desc->chip->end(); handle_edge_irq provides a generic implementation for edge-triggered interrupts. The following control flow is implemented (simplified excerpt): if (desc->status & running) { desc->chip->hold(); desc->status |= pending | masked; return; } desc->chip->start(); desc->status |= running; do { if (desc->status & masked) desc->chip->enable(); desc-status &= ~pending; handle_IRQ_event(desc->action); } while (status & pending); desc-status &= ~running; desc->chip->end(); handle_simple_irq provides a generic implementation for simple interrupts. Note: The simple flow handler does not call any handler/chip primitives. The following control flow is implemented (simplified excerpt): handle_IRQ_event(desc->action); handle_percpu_irq provides a generic implementation for per CPU interrupts. Per CPU interrupts are only available on SMP and the handler provides a simplified version without locking. The following control flow is implemented (simplified excerpt): desc->chip->start(); handle_IRQ_event(desc->action); desc->chip->end(); The generic functions are intended for 'clean' architectures and chips, which have no platform-specific IRQ handling quirks. If an architecture needs to implement quirks on the 'flow' level then it can do so by overriding the highlevel irq-flow handler. This per interrupt selectable feature, which was introduced by Russell King in the ARM interrupt implementation, does not mask an interrupt at the hardware level when disable_irq() is called. The interrupt is kept enabled and is masked in the flow handler when an interrupt event happens. This prevents losing edge interrupts on hardware which does not store an edge interrupt event while the interrupt is disabled at the hardware level. When an interrupt arrives while the IRQ_DISABLED flag is set, then the interrupt is masked at the hardware level and the IRQ_PENDING bit is set. When the interrupt is re-enabled by enable_irq() the pending bit is checked and if it is set, the interrupt is resent either via hardware or by a software resend mechanism. (It's necessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to use the delayed interrupt disable feature and your hardware is not capable of retriggering an interrupt.) The delayed interrupt disable can be runtime enabled, per interrupt, by setting the IRQ_DELAYED_DISABLE flag in the irq_desc status field. The chip level hardware descriptor structure irq_chip contains all the direct chip relevant functions, which can be utilized by the irq flow implementations. ack() mask_ack() - Optional, recommended for performance mask() unmask() retrigger() - Optional set_type() - Optional set_wake() - Optional These primitives are strictly intended to mean what they say: ack means ACK, masking means masking of an IRQ line, etc. It is up to the flow handler(s) to use these basic units of lowlevel functionality. The original implementation __do_IRQ() is an alternative entry point for all types of interrupts. This handler turned out to be not suitable for all interrupt hardware and was therefore reimplemented with split functionality for egde/level/simple/percpu interrupts. This is not only a functional optimization. It also shortens code paths for interrupts. To make use of the split implementation, replace the call to __do_IRQ by a call to desc->chip->handle_irq() and associate the appropriate handler function to desc->chip->handle_irq(). In most cases the generic handler implementations should be sufficient. The locking of chip registers is up to the architecture that defines the chip primitives. There is a chip->lock field that can be used for serialization, but the generic layer does not touch it. The per-irq structure is protected via desc->lock, by the generic layer. This chapter contains the autogenerated documentation of the structures which are used in the generic IRQ layer. !Iinclude/linux/irq.h This chapter contains the autogenerated documentation of the kernel API functions which are exported. !Ekernel/irq/manage.c !Ekernel/irq/chip.c This chapter contains the autogenerated documentation of the internal functions. !Ikernel/irq/handle.c !Ikernel/irq/chip.c The following people have contributed to this document: Thomas Gleixnertglx@linutronix.de Ingo Molnarmingo@elte.hu