/***************************************************************************/ /* * linux/arch/m68knommu/platform/5206/config.c * * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com) */ /***************************************************************************/ #include #include #include #include #include #include #include /***************************************************************************/ static void __init m5206_timers_init(void) { /* Timer1 is always used as system timer */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, MCF_MBAR + MCFSIM_TIMER1ICR); mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); #ifdef CONFIG_HIGHPROFILE /* Timer2 is to be used as a high speed profile timer */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, MCF_MBAR + MCFSIM_TIMER2ICR); mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); #endif } /***************************************************************************/ void m5206_cpu_reset(void) { local_irq_disable(); /* Set watchdog to soft reset, and enabled */ __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); for (;;) /* wait for watchdog to timeout */; } /***************************************************************************/ void __init config_BSP(char *commandp, int size) { #if defined(CONFIG_NETtel) /* Copy command line from FLASH to local buffer... */ memcpy(commandp, (char *) 0xf0004000, size); commandp[size-1] = 0; #endif /* CONFIG_NETtel */ mach_reset = m5206_cpu_reset; mach_sched_init = hw_timer_init; m5206_timers_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); mcf_mapirq2imr(28, MCFINTC_EINT4); mcf_mapirq2imr(31, MCFINTC_EINT7); } /***************************************************************************/