blob: f57d9dd9ea8530ae9c8d02723b1bc15d38002497 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
* Samsung Exynos3250 Clock Controller
The Exynos3250 clock controller generates and supplies clock to various
controllers within the Exynos3250 SoC.
Required Properties:
- compatible: should be one of the following.
- "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC.
- "samsung,exynos3250-cmu-dmc" - controller compatible with
Exynos3250 SoC for Dynamic Memory Controller domain.
- reg: physical base address of the controller and length of memory mapped
region.
- #clock-cells: should be 1.
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume.
All available clocks are defined as preprocessor macros in
dt-bindings/clock/exynos3250.h header and can be used in device
tree sources.
Example 1: Examples of clock controller nodes are listed below.
cmu: clock-controller@10030000 {
compatible = "samsung,exynos3250-cmu";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
};
cmu_dmc: clock-controller@105C0000 {
compatible = "samsung,exynos3250-cmu-dmc";
reg = <0x105C0000 0x2000>;
#clock-cells = <1>;
};
Example 2: UART controller node that consumes the clock generated by the clock
controller. Refer to the standard clock bindings for information
about 'clocks' and 'clock-names' property.
serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <0 109 0>;
clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
};
|
