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Freescale Synchronous Serial Interface

The SSI is a serial device that communicates with audio codecs.  It can
be programmed in AC97, I2S, left-justified, or right-justified modes.

Required properties:
- compatible	  : compatible list, containing "fsl,ssi"
- cell-index	  : the SSI, <0> = SSI1, <1> = SSI2, and so on
- reg		  : offset and length of the register set for the device
- interrupts	  : <a b> where a is the interrupt number and b is a
                     field that represents an encoding of the sense and
		    level information for the interrupt.  This should be
		    encoded based on the information in section 2)
		    depending on the type of interrupt controller you
		    have.
- interrupt-parent : the phandle for the interrupt controller that
                     services interrupts for this device.
- fsl,mode	  : the operating mode for the SSI interface
		    "i2s-slave" - I2S mode, SSI is clock slave
		    "i2s-master" - I2S mode, SSI is clock master
		    "lj-slave" - left-justified mode, SSI is clock slave
		    "lj-master" - l.j. mode, SSI is clock master
		    "rj-slave" - right-justified mode, SSI is clock slave
		    "rj-master" - r.j., SSI is clock master
		    "ac97-slave" - AC97 mode, SSI is clock slave
		    "ac97-master" - AC97 mode, SSI is clock master
- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for
		    playback of audio.  This is typically dictated by SOC
		    design.  See the notes below.
- fsl,capture-dma:  phandle to a DMA node for the DMA channel to use for
		    capture (recording) of audio.  This is typically dictated
		    by SOC design.  See the notes below.

Optional properties:
- codec-handle	  : phandle to a 'codec' node that defines an audio
		    codec connected to this SSI.  This node is typically
		    a child of an I2C or other control node.

Child 'codec' node required properties:
- compatible	  : compatible list, contains the name of the codec

Child 'codec' node optional properties:
- clock-frequency  : The frequency of the input clock, which typically
                     comes from an on-board dedicated oscillator.

Notes on fsl,playback-dma and fsl,capture-dma:

On SOCs that have an SSI, specific DMA channels are hard-wired for playback
and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for
playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for
playback and DMA channel 3 for capture.  The developer can choose which
DMA controller to use, but the channels themselves are hard-wired.  The
purpose of these two properties is to represent this hardware design.