summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/armada-370-rd.dts
blob: a3a2fedb87267dd21f3146d4434e91f0f80bd614 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
/*
 * Device Tree file for Marvell Armada 370 Reference Design board
 * (RD-88F6710-A1)
 *
 *  Copied from arch/arm/boot/dts/armada-370-db.dts
 *
 *  Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

/dts-v1/;
/include/ "armada-370.dtsi"

/ {
	model = "Marvell Armada 370 Reference Design";
	compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";

	chosen {
		bootargs = "console=ttyS0,115200 earlyprintk";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>; /* 512 MB */
	};

	soc {
		internal-regs {
			serial@12000 {
				clock-frequency = <200000000>;
				status = "okay";
			};
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			mdio {
				phy0: ethernet-phy@0 {
					reg = <0>;
				};

				phy1: ethernet-phy@1 {
					reg = <1>;
				};
			};

			ethernet@70000 {
				status = "okay";
				phy = <&phy0>;
				phy-mode = "sgmii";
			};
			ethernet@74000 {
				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			mvsdio@d4000 {
				pinctrl-0 = <&sdio_pins1>;
				pinctrl-names = "default";
				status = "okay";
				/* No CD or WP GPIOs */
				broken-cd;
			};

			usb@50000 {
				status = "okay";
			};

			usb@51000 {
				status = "okay";
			};

			gpio-keys {
				compatible = "gpio-keys";
				#address-cells = <1>;
				#size-cells = <0>;
				button@1 {
					label = "Software Button";
					linux,code = <116>;
					gpios = <&gpio0 6 1>;
				};
			};

			pcie-controller {
				status = "okay";

				/* Internal mini-PCIe connector */
				pcie@1,0 {
					/* Port 0, Lane 0 */
					status = "okay";
				};

				/* Internal mini-PCIe connector */
				pcie@2,0 {
					/* Port 1, Lane 0 */
					status = "okay";
				};
			};
		};
	};
 };