1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
|
/*
* Copyright 2012 Linaro Ltd
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
soc-u9500 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "stericsson,db8500";
interrupt-parent = <&intc>;
ranges;
intc: interrupt-controller@a0411000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
interrupt-parent;
reg = <0xa0411000 0x1000>,
<0xa0410100 0x100>;
};
L2: l2-cache {
compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>;
interrupts = <0 13 4>;
cache-unified;
cache-level = <2>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 7 0x4>;
};
rtc@80154000 {
compatible = "stericsson,db8500-rtc";
reg = <0x80154000 0x1000>;
interrupts = <0 18 0x4>;
};
gpio0: gpio@8012e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8012e000 0x80>;
interrupts = <0 119 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio1: gpio@8012e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8012e080 0x80>;
interrupts = <0 120 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio2: gpio@8000e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e000 0x80>;
interrupts = <0 121 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio3: gpio@8000e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e080 0x80>;
interrupts = <0 122 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio4: gpio@8000e100 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e100 0x80>;
interrupts = <0 123 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio5: gpio@8000e180 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e180 0x80>;
interrupts = <0 124 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio6: gpio@8011e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8011e000 0x80>;
interrupts = <0 125 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio7: gpio@8011e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8011e080 0x80>;
interrupts = <0 126 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio8: gpio@a03fe000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0xa03fe000 0x80>;
interrupts = <0 127 0x4>;
supports-sleepmode;
gpio-controller;
};
usb@a03e0000 {
compatible = "stericsson,db8500-musb",
"mentor,musb";
reg = <0xa03e0000 0x10000>;
interrupts = <0 23 0x4>;
};
dma-controller@801C0000 {
compatible = "stericsson,db8500-dma40",
"stericsson,dma40";
reg = <0x801C0000 0x1000 0x40010000 0x800>;
interrupts = <0 25 0x4>;
};
prcmu@80157000 {
compatible = "stericsson,db8500-prcmu";
reg = <0x80157000 0x1000>;
interrupts = <46 47>;
#address-cells = <1>;
#size-cells = <0>;
ab8500@5 {
compatible = "stericsson,ab8500";
reg = <5>; /* mailbox 5 is i2c */
interrupts = <0 40 0x4>;
};
};
i2c@80004000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80004000 0x1000>;
interrupts = <0 21 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80122000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80122000 0x1000>;
interrupts = <0 22 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80128000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80128000 0x1000>;
interrupts = <0 55 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80110000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80110000 0x1000>;
interrupts = <0 12 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@8012a000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x8012a000 0x1000>;
interrupts = <0 51 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
ssp@80002000 {
compatible = "arm,pl022", "arm,primecell";
reg = <80002000 0x1000>;
interrupts = <0 14 0x4>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
};
uart@80120000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80120000 0x1000>;
interrupts = <0 11 0x4>;
status = "disabled";
};
uart@80121000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80121000 0x1000>;
interrupts = <0 19 0x4>;
status = "disabled";
};
uart@80007000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80007000 0x1000>;
interrupts = <0 26 0x4>;
status = "disabled";
};
sdi@80126000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80126000 0x1000>;
interrupts = <0 60 0x4>;
status = "disabled";
};
sdi@80118000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80118000 0x1000>;
interrupts = <0 50 0x4>;
status = "disabled";
};
sdi@80005000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80005000 0x1000>;
interrupts = <0 41 0x4>;
status = "disabled";
};
sdi@80119000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80119000 0x1000>;
interrupts = <0 59 0x4>;
status = "disabled";
};
sdi@80114000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80114000 0x1000>;
interrupts = <0 99 0x4>;
status = "disabled";
};
sdi@80008000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80114000 0x1000>;
interrupts = <0 100 0x4>;
status = "disabled";
};
};
};
|
