1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
|
/*
* Device Tree for the ARM Integrator/CP platform
*/
/dts-v1/;
/include/ "integrator.dtsi"
/ {
model = "ARM Integrator/CP";
compatible = "arm,integrator-cp";
chosen {
bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
};
syscon {
compatible = "arm,integrator-cp-syscon";
reg = <0xcb000000 0x100>;
};
timer0: timer@13000000 {
/* TIMER0 runs @ 25MHz */
compatible = "arm,integrator-cp-timer";
status = "disabled";
};
timer1: timer@13000100 {
/* TIMER1 runs @ 1MHz */
compatible = "arm,integrator-cp-timer";
};
timer2: timer@13000200 {
/* TIMER2 runs @ 1MHz */
compatible = "arm,integrator-cp-timer";
};
pic: pic@14000000 {
valid-mask = <0x1fc003ff>;
};
cic: cic@10000040 {
compatible = "arm,versatile-fpga-irq";
#interrupt-cells = <1>;
interrupt-controller;
reg = <0x10000040 0x100>;
clear-mask = <0xffffffff>;
valid-mask = <0x00000007>;
};
sic: sic@ca000000 {
compatible = "arm,versatile-fpga-irq";
#interrupt-cells = <1>;
interrupt-controller;
reg = <0xca000000 0x100>;
clear-mask = <0x00000fff>;
valid-mask = <0x00000fff>;
};
ethernet@c8000000 {
compatible = "smsc,lan91c111";
reg = <0xc8000000 0x10>;
interrupt-parent = <&pic>;
interrupts = <27>;
};
fpga {
/*
* These PrimeCells are at the same location and using
* the same interrupts in all Integrators, but in the CP
* slightly newer versions are deployed.
*/
rtc@15000000 {
compatible = "arm,pl031", "arm,primecell";
};
uart@16000000 {
compatible = "arm,pl011", "arm,primecell";
};
uart@17000000 {
compatible = "arm,pl011", "arm,primecell";
};
kmi@18000000 {
compatible = "arm,pl050", "arm,primecell";
};
kmi@19000000 {
compatible = "arm,pl050", "arm,primecell";
};
/*
* These PrimeCells are only available on the Integrator/CP
*/
mmc@1c000000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x1c000000 0x1000>;
interrupts = <23 24>;
max-frequency = <515633>;
};
aaci@1d000000 {
compatible = "arm,pl041", "arm,primecell";
reg = <0x1d000000 0x1000>;
interrupts = <25>;
};
clcd@c0000000 {
compatible = "arm,pl110", "arm,primecell";
reg = <0xC0000000 0x1000>;
interrupts = <22>;
};
};
};
|
