1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
|
/*
* Copyright 2012 ST-Ericsson AB
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href.dtsi"
/ {
model = "ST-Ericsson HREF (v60+) platform with Device Tree";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
soc {
// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
mmc-cap-sd-highspeed;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux3_reg>;
cd-gpios = <&gpio2 31 0x4>; // 95
status = "okay";
};
// WLAN SDIO channel
sdi1_per2@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
status = "okay";
};
// PoP:ed eMMC
sdi2_per3@80005000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
status = "okay";
};
// On-board eMMC
sdi4_per2@80114000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux2_reg>;
status = "okay";
};
pinctrl {
/*
* Set this up using hogs, as time goes by and as seems fit, these
* can be moved over to being controlled by respective device.
*/
pinctrl-names = "default";
pinctrl-0 = <&ipgpio_hrefv60_mode>,
<&accel_hrefv60_mode>,
<&magneto_hrefv60_mode>,
<&etm_hrefv60_mode>,
<&nahj_hrefv60_mode>,
<&nfc_hrefv60_mode>,
<&force_hrefv60_mode>,
<&dipro_hrefv60_mode>,
<&vaudio_hf_hrefv60_mode>,
<&gbf_hrefv60_mode>,
<&hdtv_hrefv60_mode>,
<&touch_hrefv60_mode>;
sdi0 {
/* SD card detect GPIO pin, extend default state */
sdi0_default_mode: sdi0_default {
default_hrefv60_cfg1 {
ste,pins = "GPIO95_E8";
ste,config = <&gpio_in_pu>;
};
};
};
ipgpio {
/*
* XENON Flashgun on image processor GPIO (controlled from image
* processor firmware), mux in these image processor GPIO lines 0
* (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
* LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
* from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
*/
ipgpio_hrefv60_mode: ipgpio_hrefv60 {
hrefv60_mux {
ste,function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
};
hrefv60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5";
ste,config = <&in_pu>;
};
hrefv60_cfg2 {
ste,pins = "GPIO21_AB3";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg3 {
ste,pins = "GPIO64_F3";
ste,config = <&out_lo>;
};
};
};
accelerometer {
accel_hrefv60_mode: accel_hrefv60 {
/* Accelerometer interrupt lines 1 & 2 */
hrefv60_cfg1 {
ste,pins = "GPIO82_C1", "GPIO83_D3";
ste,config = <&gpio_in_pu>;
};
};
};
magnetometer {
magneto_hrefv60_mode: magneto_hrefv60 {
/* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
hrefv60_cfg1 {
ste,pins = "GPIO31_V3";
ste,config = <&gpio_in_pu>;
};
hrefv60_cfg2 {
ste,pins = "GPIO32_V2";
ste,config = <&gpio_in_pd>;
};
};
};
etm {
/*
* Drive D19-D23 for the ETM PTM trace interface low,
* (presumably pins are unconnected therefore grounded here,
* the "other alt C1" setting enables these pins)
*/
etm_hrefv60_mode: etm_hrefv60 {
hrefv60_cfg1 {
ste,pins =
"GPIO70_G5",
"GPIO71_G4",
"GPIO72_H4",
"GPIO73_H3",
"GPIO74_J3";
ste,config = <&gpio_out_lo>;
};
};
};
nahj {
nahj_hrefv60_mode: nahj_hrefv60 {
/* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
hrefv60_cfg1 {
ste,pins = "GPIO76_J2";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO216_AG12";
ste,config = <&gpio_out_hi>;
};
};
};
nfc {
nfc_hrefv60_mode: nfc_hrefv60 {
/* NFC ENA and RESET to low, pulldown IRQ line */
hrefv60_cfg1 {
ste,pins =
"GPIO77_H1", /* NFC_ENA */
"GPIO142_C11"; /* NFC_RESET */
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO144_B13"; /* NFC_IRQ */
ste,config = <&gpio_in_pd>;
};
};
};
force {
force_hrefv60_mode: force_hrefv60 {
hrefv60_cfg1 {
ste,pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
ste,config = <&gpio_in_pu>;
};
hrefv60_cfg2 {
ste,pins =
"GPIO92_D6", /* FORCE_SENSING_RST */
"GPIO97_D9"; /* FORCE_SENSING_WU */
ste,config = <&gpio_out_lo>;
};
};
};
dipro {
dipro_hrefv60_mode: dipro_hrefv60 {
hrefv60_cfg1 {
ste,pins = "GPIO139_C9"; /* DIPRO_INT */
ste,config = <&gpio_in_pu>;
};
};
};
vaudio_hf {
vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
/* Audio Amplifier HF enable GPIO */
hrefv60_cfg1 {
ste,pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
ste,config = <&gpio_out_hi>;
};
};
};
gbf {
gbf_hrefv60_mode: gbf_hrefv60 {
/*
* GBF (GPS, Bluetooth, FM-radio) interface,
* pull low to reset state
*/
hrefv60_cfg1 {
ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
ste,config = <&gpio_out_lo>;
};
};
};
hdtv {
hdtv_hrefv60_mode: hdtv_hrefv60 {
/* MSP : HDTV INTERFACE GPIO line */
hrefv60_cfg1 {
ste,pins = "GPIO192_AJ27";
ste,config = <&gpio_in_pd>;
};
};
};
touch {
touch_hrefv60_mode: touch_hrefv60 {
/*
* Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
* GPIO 67 for interrupts. Pull-up the IRQ line and drive both
* reset signals low.
*/
hrefv60_cfg1 {
ste,pins = "GPIO143_D12", "GPIO146_D13";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg2 {
ste,pins = "GPIO67_G2";
ste,config = <&gpio_in_pu>;
};
};
};
mcde {
lcd_hrefv60_mode: lcd_hrefv60 {
/*
* Display Interface 1 uses GPIO 65 for RST (reset).
* Display Interface 2 uses GPIO 66 for RST (reset).
* Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
*/
hrefv60_cfg1 {
ste,pins ="GPIO65_F1";
ste,config = <&gpio_out_hi>;
};
hrefv60_cfg2 {
ste,pins ="GPIO66_G3";
ste,config = <&gpio_out_lo>;
};
};
};
};
};
};
|
