blob: ff37fe9553eab8f57eba0f4e375b98daa9173d3a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
/***************************************************************************/
/*
* linux/arch/m68knommu/platform/523x/config.c
*
* Sub-architcture dependent initialization code for the Freescale
* 523x CPUs.
*
* Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
*/
/***************************************************************************/
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
/***************************************************************************/
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m523x_qspi_init(void)
{
u16 par;
/* setup QSPS pins for QSPI with gpio CS control */
writeb(0x1f, MCFGPIO_PAR_QSPI);
/* and CS2 & CS3 as gpio */
par = readw(MCFGPIO_PAR_TIMER);
par &= 0x3f3f;
writew(par, MCFGPIO_PAR_TIMER);
}
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
static void __init m523x_fec_init(void)
{
/* Set multi-function pins to ethernet use */
writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
}
/***************************************************************************/
void __init config_BSP(char *commandp, int size)
{
mach_sched_init = hw_timer_init;
m523x_fec_init();
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m523x_qspi_init();
#endif
}
/***************************************************************************/
|