summaryrefslogtreecommitdiffstats
path: root/arch/mips/mti-sead3/sead3-time.c
blob: ec1dd2491f962da8103e616b3c91b3758e0ddcc9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
 */
#include <linux/init.h>
#include <linux/irqchip/mips-gic.h>

#include <asm/cpu.h>
#include <asm/setup.h>
#include <asm/time.h>
#include <asm/irq.h>
#include <asm/mips-boards/generic.h>

static void __iomem *status_reg = (void __iomem *)0xbf000410;

/*
 * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect.
 */
static unsigned int __init estimate_cpu_frequency(void)
{
	unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
	unsigned int tick = 0;
	unsigned int freq;
	unsigned int orig;
	unsigned long flags;

	local_irq_save(flags);

	orig = readl(status_reg) & 0x2;		      /* get original sample */
	/* wait for transition */
	while ((readl(status_reg) & 0x2) == orig)
		;
	orig = orig ^ 0x2;			      /* flip the bit */

	write_c0_count(0);

	/* wait 1 second (the sampling clock transitions every 10ms) */
	while (tick < 100) {
		/* wait for transition */
		while ((readl(status_reg) & 0x2) == orig)
			;
		orig = orig ^ 0x2;			      /* flip the bit */
		tick++;
	}

	freq = read_c0_count();

	local_irq_restore(flags);

	mips_hpt_frequency = freq;

	/* Adjust for processor */
	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
		(prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
		freq *= 2;

	freq += 5000;	     /* rounding */
	freq -= freq%10000;

	return freq ;
}

void read_persistent_clock(struct timespec *ts)
{
	ts->tv_sec = 0;
	ts->tv_nsec = 0;
}

int get_c0_perfcount_int(void)
{
	if (gic_present)
		return gic_get_c0_compare_int();
	if (cp0_perfcount_irq >= 0)
		return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
	return -1;
}

unsigned int get_c0_compare_int(void)
{
	if (gic_present)
		return gic_get_c0_compare_int();
	return MIPS_CPU_IRQ_BASE + cp0_compare_irq;
}

void __init plat_time_init(void)
{
	unsigned int est_freq;

	est_freq = estimate_cpu_frequency();

	pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
		(est_freq % 1000000) * 100 / 1000000);

	mips_scroll_message();
}