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/* ASB2364 FPGA registers
 */

#ifndef _ASM_UNIT_FPGA_REGS_H
#define _ASM_UNIT_FPGA_REGS_H

#include <asm/cpu-regs.h>

#ifdef __KERNEL__

#define ASB2364_FPGA_REG_RESET_LAN	__SYSREG(0xa9001300, u16)
#define ASB2364_FPGA_REG_RESET_UART	__SYSREG(0xa9001304, u16)
#define ASB2364_FPGA_REG_RESET_I2C	__SYSREG(0xa9001308, u16)
#define ASB2364_FPGA_REG_RESET_USB	__SYSREG(0xa900130c, u16)
#define ASB2364_FPGA_REG_RESET_AV	__SYSREG(0xa9001310, u16)

#define ASB2364_FPGA_REG_IRQ_LAN	__SYSREG(0xa9001510, u16)
#define ASB2364_FPGA_REG_IRQ_UART	__SYSREG(0xa9001514, u16)
#define ASB2364_FPGA_REG_IRQ_I2C	__SYSREG(0xa9001518, u16)
#define ASB2364_FPGA_REG_IRQ_USB	__SYSREG(0xa900151c, u16)
#define ASB2364_FPGA_REG_IRQ_FPGA	__SYSREG(0xa9001524, u16)

#define ASB2364_FPGA_REG_MASK_LAN	__SYSREG(0xa9001590, u16)
#define ASB2364_FPGA_REG_MASK_UART	__SYSREG(0xa9001594, u16)
#define ASB2364_FPGA_REG_MASK_I2C	__SYSREG(0xa9001598, u16)
#define ASB2364_FPGA_REG_MASK_USB	__SYSREG(0xa900159c, u16)
#define ASB2364_FPGA_REG_MASK_FPGA	__SYSREG(0xa90015a4, u16)

#define ASB2364_FPGA_REG_CPLD5_SET1	__SYSREG(0xa9002500, u16)
#define ASB2364_FPGA_REG_CPLD5_SET2	__SYSREG(0xa9002504, u16)
#define ASB2364_FPGA_REG_CPLD6_SET1	__SYSREG(0xa9002600, u16)
#define ASB2364_FPGA_REG_CPLD6_SET2	__SYSREG(0xa9002604, u16)
#define ASB2364_FPGA_REG_CPLD7_SET1	__SYSREG(0xa9002700, u16)
#define ASB2364_FPGA_REG_CPLD7_SET2	__SYSREG(0xa9002704, u16)
#define ASB2364_FPGA_REG_CPLD8_SET1	__SYSREG(0xa9002800, u16)
#define ASB2364_FPGA_REG_CPLD8_SET2	__SYSREG(0xa9002804, u16)
#define ASB2364_FPGA_REG_CPLD9_SET1	__SYSREG(0xa9002900, u16)
#define ASB2364_FPGA_REG_CPLD9_SET2	__SYSREG(0xa9002904, u16)
#define ASB2364_FPGA_REG_CPLD10_SET1	__SYSREG(0xa9002a00, u16)
#define ASB2364_FPGA_REG_CPLD10_SET2	__SYSREG(0xa9002a04, u16)

#define SyncExBus()					\
	do {						\
		unsigned short w;			\
		w = *(volatile short *)0xa9000000;	\
	} while (0)

#endif /* __KERNEL__ */

#endif /* _ASM_UNIT_FPGA_REGS_H */