summaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/rocker/rocker.h
blob: 8d2865ba634c7e8babe6ca8e2f3ac05acaeaff41 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
/*
 * drivers/net/ethernet/rocker/rocker.h - Rocker switch device driver
 * Copyright (c) 2014 Jiri Pirko <jiri@resnulli.us>
 * Copyright (c) 2014 Scott Feldman <sfeldma@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef _ROCKER_H
#define _ROCKER_H

#include <linux/types.h>

#define PCI_VENDOR_ID_REDHAT		0x1b36
#define PCI_DEVICE_ID_REDHAT_ROCKER	0x0006

#define ROCKER_PCI_BAR0_SIZE		0x2000

/* MSI-X vectors */
enum {
	ROCKER_MSIX_VEC_CMD,
	ROCKER_MSIX_VEC_EVENT,
	ROCKER_MSIX_VEC_TEST,
	ROCKER_MSIX_VEC_RESERVED0,
	__ROCKER_MSIX_VEC_TX,
	__ROCKER_MSIX_VEC_RX,
#define ROCKER_MSIX_VEC_TX(port) \
	(__ROCKER_MSIX_VEC_TX + ((port) * 2))
#define ROCKER_MSIX_VEC_RX(port) \
	(__ROCKER_MSIX_VEC_RX + ((port) * 2))
#define ROCKER_MSIX_VEC_COUNT(portcnt) \
	(ROCKER_MSIX_VEC_RX((portcnt - 1)) + 1)
};

/* Rocker bogus registers */
#define ROCKER_BOGUS_REG0		0x0000
#define ROCKER_BOGUS_REG1		0x0004
#define ROCKER_BOGUS_REG2		0x0008
#define ROCKER_BOGUS_REG3		0x000c

/* Rocker test registers */
#define ROCKER_TEST_REG			0x0010
#define ROCKER_TEST_REG64		0x0018  /* 8-byte */
#define ROCKER_TEST_IRQ			0x0020
#define ROCKER_TEST_DMA_ADDR		0x0028  /* 8-byte */
#define ROCKER_TEST_DMA_SIZE		0x0030
#define ROCKER_TEST_DMA_CTRL		0x0034

/* Rocker test register ctrl */
#define ROCKER_TEST_DMA_CTRL_CLEAR	(1 << 0)
#define ROCKER_TEST_DMA_CTRL_FILL	(1 << 1)
#define ROCKER_TEST_DMA_CTRL_INVERT	(1 << 2)

/* Rocker DMA ring register offsets */
#define ROCKER_DMA_DESC_ADDR(x)		(0x1000 + (x) * 32)  /* 8-byte */
#define ROCKER_DMA_DESC_SIZE(x)		(0x1008 + (x) * 32)
#define ROCKER_DMA_DESC_HEAD(x)		(0x100c + (x) * 32)
#define ROCKER_DMA_DESC_TAIL(x)		(0x1010 + (x) * 32)
#define ROCKER_DMA_DESC_CTRL(x)		(0x1014 + (x) * 32)
#define ROCKER_DMA_DESC_CREDITS(x)	(0x1018 + (x) * 32)
#define ROCKER_DMA_DESC_RES1(x)		(0x101c + (x) * 32)

/* Rocker dma ctrl register bits */
#define ROCKER_DMA_DESC_CTRL_RESET	(1 << 0)

/* Rocker DMA ring types */
enum rocker_dma_type {
	ROCKER_DMA_CMD,
	ROCKER_DMA_EVENT,
	__ROCKER_DMA_TX,
	__ROCKER_DMA_RX,
#define ROCKER_DMA_TX(port) (__ROCKER_DMA_TX + (port) * 2)
#define ROCKER_DMA_RX(port) (__ROCKER_DMA_RX + (port) * 2)
};

/* Rocker DMA ring size limits and default sizes */
#define ROCKER_DMA_SIZE_MIN		2ul
#define ROCKER_DMA_SIZE_MAX		65536ul
#define ROCKER_DMA_CMD_DEFAULT_SIZE	32ul
#define ROCKER_DMA_EVENT_DEFAULT_SIZE	32ul
#define ROCKER_DMA_TX_DEFAULT_SIZE	64ul
#define ROCKER_DMA_TX_DESC_SIZE		256
#define ROCKER_DMA_RX_DEFAULT_SIZE	64ul
#define ROCKER_DMA_RX_DESC_SIZE		256

/* Rocker DMA descriptor struct */
struct rocker_desc {
	u64 buf_addr;
	u64 cookie;
	u16 buf_size;
	u16 tlv_size;
	u16 resv[5];
	u16 comp_err;
};

#define ROCKER_DMA_DESC_COMP_ERR_GEN	(1 << 15)

/* Rocker DMA TLV struct */
struct rocker_tlv {
	u32 type;
	u16 len;
};

/* TLVs */
enum {
	ROCKER_TLV_CMD_UNSPEC,
	ROCKER_TLV_CMD_TYPE,	/* u16 */
	ROCKER_TLV_CMD_INFO,	/* nest */

	__ROCKER_TLV_CMD_MAX,
	ROCKER_TLV_CMD_MAX = __ROCKER_TLV_CMD_MAX - 1,
};

enum {
	ROCKER_TLV_CMD_TYPE_UNSPEC,
	ROCKER_TLV_CMD_TYPE_GET_PORT_SETTINGS,
	ROCKER_TLV_CMD_TYPE_SET_PORT_SETTINGS,
	ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_ADD,
	ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_MOD,
	ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_DEL,
	ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_GET_STATS,
	ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_ADD,
	ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_MOD,
	ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_DEL,
	ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_GET_STATS,

	__ROCKER_TLV_CMD_TYPE_MAX,
	ROCKER_TLV_CMD_TYPE_MAX = __ROCKER_TLV_CMD_TYPE_MAX - 1,
};

enum {
	ROCKER_TLV_CMD_PORT_SETTINGS_UNSPEC,
	ROCKER_TLV_CMD_PORT_SETTINGS_LPORT,		/* u32 */
	ROCKER_TLV_CMD_PORT_SETTINGS_SPEED,		/* u32 */
	ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX,		/* u8 */
	ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG,		/* u8 */
	ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR,		/* binary */
	ROCKER_TLV_CMD_PORT_SETTINGS_MODE,		/* u8 */
	ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING,		/* u8 */

	__ROCKER_TLV_CMD_PORT_SETTINGS_MAX,
	ROCKER_TLV_CMD_PORT_SETTINGS_MAX =
			__ROCKER_TLV_CMD_PORT_SETTINGS_MAX - 1,
};

enum rocker_port_mode {
	ROCKER_PORT_MODE_OF_DPA,
};

enum {
	ROCKER_TLV_EVENT_UNSPEC,
	ROCKER_TLV_EVENT_TYPE,	/* u16 */
	ROCKER_TLV_EVENT_INFO,	/* nest */

	__ROCKER_TLV_EVENT_MAX,
	ROCKER_TLV_EVENT_MAX = __ROCKER_TLV_EVENT_MAX - 1,
};

enum {
	ROCKER_TLV_EVENT_TYPE_UNSPEC,
	ROCKER_TLV_EVENT_TYPE_LINK_CHANGED,
	ROCKER_TLV_EVENT_TYPE_MAC_VLAN_SEEN,

	__ROCKER_TLV_EVENT_TYPE_MAX,
	ROCKER_TLV_EVENT_TYPE_MAX = __ROCKER_TLV_EVENT_TYPE_MAX - 1,
};

enum {
	ROCKER_TLV_EVENT_LINK_CHANGED_UNSPEC,
	ROCKER_TLV_EVENT_LINK_CHANGED_LPORT,	/* u32 */
	ROCKER_TLV_EVENT_LINK_CHANGED_LINKUP,	/* u8 */

	__ROCKER_TLV_EVENT_LINK_CHANGED_MAX,
	ROCKER_TLV_EVENT_LINK_CHANGED_MAX =
			__ROCKER_TLV_EVENT_LINK_CHANGED_MAX - 1,
};

enum {
	ROCKER_TLV_EVENT_MAC_VLAN_UNSPEC,
	ROCKER_TLV_EVENT_MAC_VLAN_LPORT,	/* u32 */
	ROCKER_TLV_EVENT_MAC_VLAN_MAC,		/* binary */
	ROCKER_TLV_EVENT_MAC_VLAN_VLAN_ID,	/* __be16 */

	__ROCKER_TLV_EVENT_MAC_VLAN_MAX,
	ROCKER_TLV_EVENT_MAC_VLAN_MAX = __ROCKER_TLV_EVENT_MAC_VLAN_MAX - 1,
};

enum {
	ROCKER_TLV_RX_UNSPEC,
	ROCKER_TLV_RX_FLAGS,		/* u16, see ROCKER_RX_FLAGS_ */
	ROCKER_TLV_RX_CSUM,		/* u16 */
	ROCKER_TLV_RX_FRAG_ADDR,	/* u64 */
	ROCKER_TLV_RX_FRAG_MAX_LEN,	/* u16 */
	ROCKER_TLV_RX_FRAG_LEN,		/* u16 */

	__ROCKER_TLV_RX_MAX,
	ROCKER_TLV_RX_MAX = __ROCKER_TLV_RX_MAX - 1,
};

#define ROCKER_RX_FLAGS_IPV4			(1 << 0)
#define ROCKER_RX_FLAGS_IPV6			(1 << 1)
#define ROCKER_RX_FLAGS_CSUM_CALC		(1 << 2)
#define ROCKER_RX_FLAGS_IPV4_CSUM_GOOD		(1 << 3)
#define ROCKER_RX_FLAGS_IP_FRAG			(1 << 4)
#define ROCKER_RX_FLAGS_TCP			(1 << 5)
#define ROCKER_RX_FLAGS_UDP			(1 << 6)
#define ROCKER_RX_FLAGS_TCP_UDP_CSUM_GOOD	(1 << 7)

enum {
	ROCKER_TLV_TX_UNSPEC,
	ROCKER_TLV_TX_OFFLOAD,		/* u8, see ROCKER_TX_OFFLOAD_ */
	ROCKER_TLV_TX_L3_CSUM_OFF,	/* u16 */
	ROCKER_TLV_TX_TSO_MSS,		/* u16 */
	ROCKER_TLV_TX_TSO_HDR_LEN,	/* u16 */
	ROCKER_TLV_TX_FRAGS,		/* array */

	__ROCKER_TLV_TX_MAX,
	ROCKER_TLV_TX_MAX = __ROCKER_TLV_TX_MAX - 1,
};

#define ROCKER_TX_OFFLOAD_NONE		0
#define ROCKER_TX_OFFLOAD_IP_CSUM	1
#define ROCKER_TX_OFFLOAD_TCP_UDP_CSUM	2
#define ROCKER_TX_OFFLOAD_L3_CSUM	3
#define ROCKER_TX_OFFLOAD_TSO		4

#define ROCKER_TX_FRAGS_MAX		16

enum {
	ROCKER_TLV_TX_FRAG_UNSPEC,
	ROCKER_TLV_TX_FRAG,		/* nest */

	__ROCKER_TLV_TX_FRAG_MAX,
	ROCKER_TLV_TX_FRAG_MAX = __ROCKER_TLV_TX_FRAG_MAX - 1,
};

enum {
	ROCKER_TLV_TX_FRAG_ATTR_UNSPEC,
	ROCKER_TLV_TX_FRAG_ATTR_ADDR,	/* u64 */
	ROCKER_TLV_TX_FRAG_ATTR_LEN,	/* u16 */

	__ROCKER_TLV_TX_FRAG_ATTR_MAX,
	ROCKER_TLV_TX_FRAG_ATTR_MAX = __ROCKER_TLV_TX_FRAG_ATTR_MAX - 1,
};

/* cmd info nested for OF-DPA msgs */
enum {
	ROCKER_TLV_OF_DPA_UNSPEC,
	ROCKER_TLV_OF_DPA_TABLE_ID,		/* u16 */
	ROCKER_TLV_OF_DPA_PRIORITY,		/* u32 */
	ROCKER_TLV_OF_DPA_HARDTIME,		/* u32 */
	ROCKER_TLV_OF_DPA_IDLETIME,		/* u32 */
	ROCKER_TLV_OF_DPA_COOKIE,		/* u64 */
	ROCKER_TLV_OF_DPA_IN_LPORT,		/* u32 */
	ROCKER_TLV_OF_DPA_IN_LPORT_MASK,	/* u32 */
	ROCKER_TLV_OF_DPA_OUT_LPORT,		/* u32 */
	ROCKER_TLV_OF_DPA_GOTO_TABLE_ID,	/* u16 */
	ROCKER_TLV_OF_DPA_GROUP_ID,		/* u32 */
	ROCKER_TLV_OF_DPA_GROUP_ID_LOWER,	/* u32 */
	ROCKER_TLV_OF_DPA_GROUP_COUNT,		/* u16 */
	ROCKER_TLV_OF_DPA_GROUP_IDS,		/* u32 array */
	ROCKER_TLV_OF_DPA_VLAN_ID,		/* __be16 */
	ROCKER_TLV_OF_DPA_VLAN_ID_MASK,		/* __be16 */
	ROCKER_TLV_OF_DPA_VLAN_PCP,		/* __be16 */
	ROCKER_TLV_OF_DPA_VLAN_PCP_MASK,	/* __be16 */
	ROCKER_TLV_OF_DPA_VLAN_PCP_ACTION,	/* u8 */
	ROCKER_TLV_OF_DPA_NEW_VLAN_ID,		/* __be16 */
	ROCKER_TLV_OF_DPA_NEW_VLAN_PCP,		/* u8 */
	ROCKER_TLV_OF_DPA_TUNNEL_ID,		/* u32 */
	ROCKER_TLV_OF_DPA_TUN_LOG_LPORT,	/* u32 */
	ROCKER_TLV_OF_DPA_ETHERTYPE,		/* __be16 */
	ROCKER_TLV_OF_DPA_DST_MAC,		/* binary */
	ROCKER_TLV_OF_DPA_DST_MAC_MASK,		/* binary */
	ROCKER_TLV_OF_DPA_SRC_MAC,		/* binary */
	ROCKER_TLV_OF_DPA_SRC_MAC_MASK,		/* binary */
	ROCKER_TLV_OF_DPA_IP_PROTO,		/* u8 */
	ROCKER_TLV_OF_DPA_IP_PROTO_MASK,	/* u8 */
	ROCKER_TLV_OF_DPA_IP_DSCP,		/* u8 */
	ROCKER_TLV_OF_DPA_IP_DSCP_MASK,		/* u8 */
	ROCKER_TLV_OF_DPA_IP_DSCP_ACTION,	/* u8 */
	ROCKER_TLV_OF_DPA_NEW_IP_DSCP,		/* u8 */
	ROCKER_TLV_OF_DPA_IP_ECN,		/* u8 */
	ROCKER_TLV_OF_DPA_IP_ECN_MASK,		/* u8 */
	ROCKER_TLV_OF_DPA_DST_IP,		/* __be32 */
	ROCKER_TLV_OF_DPA_DST_IP_MASK,		/* __be32 */
	ROCKER_TLV_OF_DPA_SRC_IP,		/* __be32 */
	ROCKER_TLV_OF_DPA_SRC_IP_MASK,		/* __be32 */
	ROCKER_TLV_OF_DPA_DST_IPV6,		/* binary */
	ROCKER_TLV_OF_DPA_DST_IPV6_MASK,	/* binary */
	ROCKER_TLV_OF_DPA_SRC_IPV6,		/* binary */
	ROCKER_TLV_OF_DPA_SRC_IPV6_MASK,	/* binary */
	ROCKER_TLV_OF_DPA_SRC_ARP_IP,		/* __be32 */
	ROCKER_TLV_OF_DPA_SRC_ARP_IP_MASK,	/* __be32 */
	ROCKER_TLV_OF_DPA_L4_DST_PORT,		/* __be16 */
	ROCKER_TLV_OF_DPA_L4_DST_PORT_MASK,	/* __be16 */
	ROCKER_TLV_OF_DPA_L4_SRC_PORT,		/* __be16 */
	ROCKER_TLV_OF_DPA_L4_SRC_PORT_MASK,	/* __be16 */
	ROCKER_TLV_OF_DPA_ICMP_TYPE,		/* u8 */
	ROCKER_TLV_OF_DPA_ICMP_TYPE_MASK,	/* u8 */
	ROCKER_TLV_OF_DPA_ICMP_CODE,		/* u8 */
	ROCKER_TLV_OF_DPA_ICMP_CODE_MASK,	/* u8 */
	ROCKER_TLV_OF_DPA_IPV6_LABEL,		/* __be32 */
	ROCKER_TLV_OF_DPA_IPV6_LABEL_MASK,	/* __be32 */
	ROCKER_TLV_OF_DPA_QUEUE_ID_ACTION,	/* u8 */
	ROCKER_TLV_OF_DPA_NEW_QUEUE_ID,		/* u8 */
	ROCKER_TLV_OF_DPA_CLEAR_ACTIONS,	/* u32 */
	ROCKER_TLV_OF_DPA_POP_VLAN,		/* u8 */
	ROCKER_TLV_OF_DPA_TTL_CHECK,		/* u8 */
	ROCKER_TLV_OF_DPA_COPY_CPU_ACTION,	/* u8 */

	__ROCKER_TLV_OF_DPA_MAX,
	ROCKER_TLV_OF_DPA_MAX = __ROCKER_TLV_OF_DPA_MAX - 1,
};

/* OF-DPA table IDs */

enum rocker_of_dpa_table_id {
	ROCKER_OF_DPA_TABLE_ID_INGRESS_PORT = 0,
	ROCKER_OF_DPA_TABLE_ID_VLAN = 10,
	ROCKER_OF_DPA_TABLE_ID_TERMINATION_MAC = 20,
	ROCKER_OF_DPA_TABLE_ID_UNICAST_ROUTING = 30,
	ROCKER_OF_DPA_TABLE_ID_MULTICAST_ROUTING = 40,
	ROCKER_OF_DPA_TABLE_ID_BRIDGING = 50,
	ROCKER_OF_DPA_TABLE_ID_ACL_POLICY = 60,
};

/* OF-DPA flow stats */
enum {
	ROCKER_TLV_OF_DPA_FLOW_STAT_UNSPEC,
	ROCKER_TLV_OF_DPA_FLOW_STAT_DURATION,	/* u32 */
	ROCKER_TLV_OF_DPA_FLOW_STAT_RX_PKTS,	/* u64 */
	ROCKER_TLV_OF_DPA_FLOW_STAT_TX_PKTS,	/* u64 */

	__ROCKER_TLV_OF_DPA_FLOW_STAT_MAX,
	ROCKER_TLV_OF_DPA_FLOW_STAT_MAX = __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX - 1,
};

/* OF-DPA group types */
enum rocker_of_dpa_group_type {
	ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE = 0,
	ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE,
	ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST,
	ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST,
	ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD,
	ROCKER_OF_DPA_GROUP_TYPE_L3_INTERFACE,
	ROCKER_OF_DPA_GROUP_TYPE_L3_MCAST,
	ROCKER_OF_DPA_GROUP_TYPE_L3_ECMP,
	ROCKER_OF_DPA_GROUP_TYPE_L2_OVERLAY,
};

/* OF-DPA group L2 overlay types */
enum rocker_of_dpa_overlay_type {
	ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_UCAST = 0,
	ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_MCAST,
	ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_UCAST,
	ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_MCAST,
};

/* OF-DPA group ID encoding */
#define ROCKER_GROUP_TYPE_SHIFT 28
#define ROCKER_GROUP_TYPE_MASK 0xf0000000
#define ROCKER_GROUP_VLAN_SHIFT 16
#define ROCKER_GROUP_VLAN_MASK 0x0fff0000
#define ROCKER_GROUP_PORT_SHIFT 0
#define ROCKER_GROUP_PORT_MASK 0x0000ffff
#define ROCKER_GROUP_TUNNEL_ID_SHIFT 12
#define ROCKER_GROUP_TUNNEL_ID_MASK 0x0ffff000
#define ROCKER_GROUP_SUBTYPE_SHIFT 10
#define ROCKER_GROUP_SUBTYPE_MASK 0x00000c00
#define ROCKER_GROUP_INDEX_SHIFT 0
#define ROCKER_GROUP_INDEX_MASK 0x0000ffff
#define ROCKER_GROUP_INDEX_LONG_SHIFT 0
#define ROCKER_GROUP_INDEX_LONG_MASK 0x0fffffff

#define ROCKER_GROUP_TYPE_GET(group_id) \
	(((group_id) & ROCKER_GROUP_TYPE_MASK) >> ROCKER_GROUP_TYPE_SHIFT)
#define ROCKER_GROUP_TYPE_SET(type) \
	(((type) << ROCKER_GROUP_TYPE_SHIFT) & ROCKER_GROUP_TYPE_MASK)
#define ROCKER_GROUP_VLAN_GET(group_id) \
	(((group_id) & ROCKER_GROUP_VLAN_ID_MASK) >> ROCKER_GROUP_VLAN_ID_SHIFT)
#define ROCKER_GROUP_VLAN_SET(vlan_id) \
	(((vlan_id) << ROCKER_GROUP_VLAN_SHIFT) & ROCKER_GROUP_VLAN_MASK)
#define ROCKER_GROUP_PORT_GET(group_id) \
	(((group_id) & ROCKER_GROUP_PORT_MASK) >> ROCKER_GROUP_PORT_SHIFT)
#define ROCKER_GROUP_PORT_SET(port) \
	(((port) << ROCKER_GROUP_PORT_SHIFT) & ROCKER_GROUP_PORT_MASK)
#define ROCKER_GROUP_INDEX_GET(group_id) \
	(((group_id) & ROCKER_GROUP_INDEX_MASK) >> ROCKER_GROUP_INDEX_SHIFT)
#define ROCKER_GROUP_INDEX_SET(index) \
	(((index) << ROCKER_GROUP_INDEX_SHIFT) & ROCKER_GROUP_INDEX_MASK)
#define ROCKER_GROUP_INDEX_LONG_GET(group_id) \
	(((group_id) & ROCKER_GROUP_INDEX_LONG_MASK) >> \
	 ROCKER_GROUP_INDEX_LONG_SHIFT)
#define ROCKER_GROUP_INDEX_LONG_SET(index) \
	(((index) << ROCKER_GROUP_INDEX_LONG_SHIFT) & \
	 ROCKER_GROUP_INDEX_LONG_MASK)

#define ROCKER_GROUP_NONE 0
#define ROCKER_GROUP_L2_INTERFACE(vlan_id, port) \
	(ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE) |\
	 ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_PORT_SET(port))
#define ROCKER_GROUP_L2_REWRITE(index) \
	(ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE) |\
	 ROCKER_GROUP_INDEX_LONG_SET(index))
#define ROCKER_GROUP_L2_MCAST(vlan_id, index) \
	(ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST) |\
	 ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
#define ROCKER_GROUP_L2_FLOOD(vlan_id, index) \
	(ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD) |\
	ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
#define ROCKER_GROUP_L3_UNICAST(index) \
	(ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST) |\
	 ROCKER_GROUP_INDEX_LONG_SET(index))

/* Rocker general purpose registers */
#define ROCKER_CONTROL			0x0300
#define ROCKER_PORT_PHYS_COUNT		0x0304
#define ROCKER_PORT_PHYS_LINK_STATUS	0x0310 /* 8-byte */
#define ROCKER_PORT_PHYS_ENABLE		0x0318 /* 8-byte */
#define ROCKER_SWITCH_ID		0x0320 /* 8-byte */

/* Rocker control bits */
#define ROCKER_CONTROL_RESET		(1 << 0)

#endif