summaryrefslogtreecommitdiffstats
path: root/include/asm-ppc64/bitops.h
blob: dbfa42ef4a99d389bd841da2c4f8f54a39da8ac9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
/*
 * PowerPC64 atomic bit operations.
 * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner,
 * Anton Blanchard
 *
 * Originally taken from the 32b PPC code.  Modified to use 64b values for
 * the various counters & memory references.
 *
 * Bitops are odd when viewed on big-endian systems.  They were designed
 * on little endian so the size of the bitset doesn't matter (low order bytes
 * come first) as long as the bit in question is valid.
 *
 * Bits are "tested" often using the C expression (val & (1<<nr)) so we do
 * our best to stay compatible with that.  The assumption is that val will
 * be unsigned long for such tests.  As such, we assume the bits are stored
 * as an array of unsigned long (the usual case is a single unsigned long,
 * of course).  Here's an example bitset with bit numbering:
 *
 *   |63..........0|127........64|195.......128|255.......196|
 *
 * This leads to a problem. If an int, short or char is passed as a bitset
 * it will be a bad memory reference since we want to store in chunks
 * of unsigned long (64 bits here) size.
 *
 * There are a few little-endian macros used mostly for filesystem bitmaps,
 * these work on similar bit arrays layouts, but byte-oriented:
 *
 *   |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
 *
 * The main difference is that bit 3-5 in the bit number field needs to be
 * reversed compared to the big-endian bit fields. This can be achieved
 * by XOR with 0b111000 (0x38).
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _PPC64_BITOPS_H
#define _PPC64_BITOPS_H

#ifdef __KERNEL__

#include <asm/synch.h>

/*
 * clear_bit doesn't imply a memory barrier
 */
#define smp_mb__before_clear_bit()	smp_mb()
#define smp_mb__after_clear_bit()	smp_mb()

static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr)
{
	return (1UL & (addr[nr >> 6] >> (nr & 63)));
}

static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
"1:	ldarx	%0,0,%3		# set_bit\n\
	or	%0,%0,%2\n\
	stdcx.	%0,0,%3\n\
	bne-	1b"
	: "=&r" (old), "=m" (*p)
	: "r" (mask), "r" (p), "m" (*p)
	: "cc");
}

static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
"1:	ldarx	%0,0,%3		# clear_bit\n\
	andc	%0,%0,%2\n\
	stdcx.	%0,0,%3\n\
	bne-	1b"
	: "=&r" (old), "=m" (*p)
	: "r" (mask), "r" (p), "m" (*p)
	: "cc");
}

static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
"1:	ldarx	%0,0,%3		# change_bit\n\
	xor	%0,%0,%2\n\
	stdcx.	%0,0,%3\n\
	bne-	1b"
	: "=&r" (old), "=m" (*p)
	: "r" (mask), "r" (p), "m" (*p)
	: "cc");
}

static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old, t;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
	EIEIO_ON_SMP
"1:	ldarx	%0,0,%3		# test_and_set_bit\n\
	or	%1,%0,%2 \n\
	stdcx.	%1,0,%3 \n\
	bne-	1b"
	ISYNC_ON_SMP
	: "=&r" (old), "=&r" (t)
	: "r" (mask), "r" (p)
	: "cc", "memory");

	return (old & mask) != 0;
}

static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old, t;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
	EIEIO_ON_SMP
"1:	ldarx	%0,0,%3		# test_and_clear_bit\n\
	andc	%1,%0,%2\n\
	stdcx.	%1,0,%3\n\
	bne-	1b"
	ISYNC_ON_SMP
	: "=&r" (old), "=&r" (t)
	: "r" (mask), "r" (p)
	: "cc", "memory");

	return (old & mask) != 0;
}

static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long old, t;
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	__asm__ __volatile__(
	EIEIO_ON_SMP
"1:	ldarx	%0,0,%3		# test_and_change_bit\n\
	xor	%1,%0,%2\n\
	stdcx.	%1,0,%3\n\
	bne-	1b"
	ISYNC_ON_SMP
	: "=&r" (old), "=&r" (t)
	: "r" (mask), "r" (p)
	: "cc", "memory");

	return (old & mask) != 0;
}

static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
{
	unsigned long old;

	__asm__ __volatile__(
"1:	ldarx	%0,0,%3		# set_bit\n\
	or	%0,%0,%2\n\
	stdcx.	%0,0,%3\n\
	bne-	1b"
	: "=&r" (old), "=m" (*addr)
	: "r" (mask), "r" (addr), "m" (*addr)
	: "cc");
}

/*
 * non-atomic versions
 */
static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	*p |= mask;
}

static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	*p &= ~mask;
}

static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);

	*p ^= mask;
}

static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
	unsigned long old = *p;

	*p = old | mask;
	return (old & mask) != 0;
}

static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
	unsigned long old = *p;

	*p = old & ~mask;
	return (old & mask) != 0;
}

static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
{
	unsigned long mask = 1UL << (nr & 0x3f);
	unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
	unsigned long old = *p;

	*p = old ^ mask;
	return (old & mask) != 0;
}

/*
 * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the
 * most significant (left-most) 1-bit in a double word.
 */
static __inline__ int __ilog2(unsigned long x)
{
	int lz;

	asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
	return 63 - lz;
}

/*
 * Determines the bit position of the least significant (rightmost) 0 bit
 * in the specified double word. The returned bit position will be zero-based,
 * starting from the right side (63 - 0).
 */
static __inline__ unsigned long ffz(unsigned long x)
{
	/* no zero exists anywhere in the 8 byte area. */
	if ((x = ~x) == 0)
		return 64;

	/*
	 * Calculate the bit position of the least signficant '1' bit in x
	 * (since x has been changed this will actually be the least signficant
	 * '0' bit in * the original x).  Note: (x & -x) gives us a mask that
	 * is the least significant * (RIGHT-most) 1-bit of the value in x.
	 */
	return __ilog2(x & -x);
}

static __inline__ int __ffs(unsigned long x)
{
	return __ilog2(x & -x);
}

/*
 * ffs: find first bit set. This is defined the same way as
 * the libc and compiler builtin ffs routines, therefore
 * differs in spirit from the above ffz (man ffs).
 */
static __inline__ int ffs(int x)
{
	unsigned long i = (unsigned long)x;
	return __ilog2(i & -i) + 1;
}

/*
 * fls: find last (most-significant) bit set.
 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
 */
#define fls(x) generic_fls(x)

/*
 * hweightN: returns the hamming weight (i.e. the number
 * of bits set) of a N-bit word
 */
#define hweight64(x) generic_hweight64(x)
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)

extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
#define find_first_zero_bit(addr, size) \
	find_next_zero_bit((addr), (size), 0)

extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
#define find_first_bit(addr, size) \
	find_next_bit((addr), (size), 0)

extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
#define find_first_zero_le_bit(addr, size) \
	find_next_zero_le_bit((addr), (size), 0)

static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr)
{
	__const__ unsigned char	*ADDR = (__const__ unsigned char *) addr;
	return (ADDR[nr >> 3] >> (nr & 7)) & 1;
}

#define test_and_clear_le_bit(nr, addr) \
	test_and_clear_bit((nr) ^ 0x38, (addr))
#define test_and_set_le_bit(nr, addr) \
	test_and_set_bit((nr) ^ 0x38, (addr))

/*
 * non-atomic versions
 */

#define __set_le_bit(nr, addr) \
	__set_bit((nr) ^ 0x38, (addr))
#define __clear_le_bit(nr, addr) \
	__clear_bit((nr) ^ 0x38, (addr))
#define __test_and_clear_le_bit(nr, addr) \
	__test_and_clear_bit((nr) ^ 0x38, (addr))
#define __test_and_set_le_bit(nr, addr) \
	__test_and_set_bit((nr) ^ 0x38, (addr))

#define ext2_set_bit(nr,addr) \
	__test_and_set_le_bit((nr), (unsigned long*)addr)
#define ext2_clear_bit(nr, addr) \
	__test_and_clear_le_bit((nr), (unsigned long*)addr)

#define ext2_set_bit_atomic(lock, nr, addr) \
	test_and_set_le_bit((nr), (unsigned long*)addr)
#define ext2_clear_bit_atomic(lock, nr, addr) \
	test_and_clear_le_bit((nr), (unsigned long*)addr)


#define ext2_test_bit(nr, addr)      test_le_bit((nr),(unsigned long*)addr)
#define ext2_find_first_zero_bit(addr, size) \
	find_first_zero_le_bit((unsigned long*)addr, size)
#define ext2_find_next_zero_bit(addr, size, off) \
	find_next_zero_le_bit((unsigned long*)addr, size, off)

#define minix_test_and_set_bit(nr,addr)		test_and_set_bit(nr,addr)
#define minix_set_bit(nr,addr)			set_bit(nr,addr)
#define minix_test_and_clear_bit(nr,addr)	test_and_clear_bit(nr,addr)
#define minix_test_bit(nr,addr)			test_bit(nr,addr)
#define minix_find_first_zero_bit(addr,size)	find_first_zero_bit(addr,size)

#endif /* __KERNEL__ */
#endif /* _PPC64_BITOPS_H */