summaryrefslogtreecommitdiffstats
path: root/include/linux/fs_enet_pd.h
blob: 932223550aca77edfbcf59d079d39d5522fc3536 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
/*
 * Platform information definitions for the
 * universal Freescale Ethernet driver.
 *
 * Copyright (c) 2003 Intracom S.A. 
 *  by Pantelis Antoniou <panto@intracom.gr>
 *
 * 2005 (c) MontaVista Software, Inc. 
 * Vitaly Bordug <vbordug@ru.mvista.com>
 *
 * This file is licensed under the terms of the GNU General Public License 
 * version 2. This program is licensed "as is" without any warranty of any 
 * kind, whether express or implied.
 */

#ifndef FS_ENET_PD_H
#define FS_ENET_PD_H

#include <asm/types.h>

#define FS_ENET_NAME	"fs_enet"

enum fs_id {
	fsid_fec1,
	fsid_fec2,
	fsid_fcc1,
	fsid_fcc2,
	fsid_fcc3,
	fsid_scc1,
	fsid_scc2,
	fsid_scc3,
	fsid_scc4,
};

#define FS_MAX_INDEX	9

static inline int fs_get_fec_index(enum fs_id id)
{
	if (id >= fsid_fec1 && id <= fsid_fec2)
		return id - fsid_fec1;
	return -1;
}

static inline int fs_get_fcc_index(enum fs_id id)
{
	if (id >= fsid_fcc1 && id <= fsid_fcc3)
		return id - fsid_fcc1;
	return -1;
}

static inline int fs_get_scc_index(enum fs_id id)
{
	if (id >= fsid_scc1 && id <= fsid_scc4)
		return id - fsid_scc1;
	return -1;
}

enum fs_mii_method {
	fsmii_fixed,
	fsmii_fec,
	fsmii_bitbang,
};

enum fs_ioport {
	fsiop_porta,
	fsiop_portb,
	fsiop_portc,
	fsiop_portd,
	fsiop_porte,
};

struct fs_mii_bit {
	u32 offset;
	u8 bit;
	u8 polarity;
};
struct fs_mii_bb_platform_info {
	struct fs_mii_bit 	mdio_dir;
	struct fs_mii_bit 	mdio_dat;
	struct fs_mii_bit	mdc_dat;
	int mdio_port;	/* port & bit for MDIO */
	int mdio_bit;
	int mdc_port;	/* port & bit for MDC  */
	int mdc_bit;
	int delay;	/* delay in us         */
	int irq[32]; 	/* irqs per phy's */
};

struct fs_platform_info {

	void(*init_ioports)(struct fs_platform_info *);
	/* device specific information */
	int fs_no;		/* controller index            */

	u32 cp_page;		/* CPM page */
	u32 cp_block;		/* CPM sblock */

	u32 clk_trx;		/* some stuff for pins & mux configuration*/
	u32 clk_rx;
	u32 clk_tx;
	u32 clk_route;
	u32 clk_mask;

	u32 mem_offset;
	u32 dpram_offset;
	u32 fcc_regs_c;
	
	u32 device_flags;

	int phy_addr;		/* the phy address (-1 no phy) */
	const char*	bus_id;
	int phy_irq;		/* the phy irq (if it exists)  */

	const struct fs_mii_bus_info *bus_info;

	int rx_ring, tx_ring;	/* number of buffers on rx     */
	__u8 macaddr[6];	/* mac address                 */
	int rx_copybreak;	/* limit we copy small frames  */
	int use_napi;		/* use NAPI                    */
	int napi_weight;	/* NAPI weight                 */

	int use_rmii;		/* use RMII mode 	       */
	int has_phy;            /* if the network is phy container as well...*/
};
struct fs_mii_fec_platform_info {
	u32 irq[32];
	u32 mii_speed;
};
#endif