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authorXavier Leroy <xavier.leroy@inria.fr>2003-08-05 13:39:03 +0000
committerXavier Leroy <xavier.leroy@inria.fr>2003-08-05 13:39:03 +0000
commit28fc343d082dbc98e98477cd510186df6cc94ed5 (patch)
treee8b26ce91caa3ca1105dde306ef6f69bf688e309 /asmcomp/ia64
parentc9889c91815b978781a7db417698c678c6de8c0f (diff)
MAJ suite a modfs dans selectgen.ml
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@5765 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Diffstat (limited to 'asmcomp/ia64')
-rw-r--r--asmcomp/ia64/selection.ml5
1 files changed, 4 insertions, 1 deletions
diff --git a/asmcomp/ia64/selection.ml b/asmcomp/ia64/selection.ml
index 82fdf152a..3bd48ef5d 100644
--- a/asmcomp/ia64/selection.ml
+++ b/asmcomp/ia64/selection.ml
@@ -161,7 +161,10 @@ method emit_stores env data regs_addr =
self#insert (Iop(Ispecific(Istoreincr 16))) [| t2; r |] [| t2 |];
backlog := None in
List.iter
- (fun exp -> Array.iter do_store (self#emit_expr env exp))
+ (fun exp ->
+ match self#emit_expr env exp with
+ None -> assert false
+ | Some regs -> Array.iter do_store regs)
data;
(* Store the backlog if any *)
begin match !backlog with