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authorSonika Jindal <sonika.jindal@intel.com>2014-08-08 16:23:42 +0530
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-09-03 11:05:36 +0200
commit0ded925435ba40e1328565d3de869b3635207ef2 (patch)
tree2e6a8985443364d91567e8899962375b71f43c2c
parent0504cd170c86f0617f27a31f1ba2328caa976707 (diff)
drm/exynos: Renaming DP training vswing pre emph defines
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Acked-by: Dave Airlie <airlied@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/exynos/exynos_dp_core.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 4f3c7eb2d37..02602a8254c 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -329,8 +329,8 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
return retval;
for (lane = 0; lane < lane_count; lane++)
- buf[lane] = DP_TRAIN_PRE_EMPHASIS_0 |
- DP_TRAIN_VOLTAGE_SWING_400;
+ buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 |
+ DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
lane_count, buf);