diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-01-13 13:01:49 +0000 |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 15:37:38 +0000 |
| commit | 13e45f095753b8203a8446648dea527f9ce4413c (patch) | |
| tree | b81e48b104b14339e0f5409a1a5ecdb816a1c36d | |
| parent | e0d32f33e651a393a23826c06a9301917372f3e2 (diff) | |
MIPS: kernel: process: Do not allow FR=0 on MIPS R6
A prctl() call to set FR=0 for MIPS R6 should not be allowed
since FR=1 is the only option for R6 cores.
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
| -rw-r--r-- | arch/mips/kernel/process.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 4677b4c67da..696d59e40fa 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -581,6 +581,10 @@ int mips_set_process_fp_mode(struct task_struct *task, unsigned int value) if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre) return -EOPNOTSUPP; + /* FR = 0 not supported in MIPS R6 */ + if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6) + return -EOPNOTSUPP; + /* Save FP & vector context, then disable FPU & MSA */ if (task->signal == current->signal) lose_fpu(1); |