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authorBorislav Petkov <borislav.petkov@amd.com>2011-08-10 09:43:30 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-11-01 10:01:50 -0200
commit168eb34dedf2f9456cc26f513d27de65c64fc608 (patch)
treedc4de94b3f66d30beaebd66168e058b83a7827f4
parent4055759145b421537207ed0d034041f1774ab41d (diff)
EDAC: Correct Kconfig dependencies
Both AMD and Intel i7 EDAC drivers use MCE features and are thus dependent of this functionality present in the kernel. Express this in Kconfig so that randconfig builds don't break. Reported-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r--drivers/edac/Kconfig5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index f888fb59918..d057d6c4020 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -41,7 +41,7 @@ config EDAC_DEBUG
config EDAC_DECODE_MCE
tristate "Decode MCEs in human-readable form (only on AMD for now)"
- depends on CPU_SUP_AMD && X86_MCE
+ depends on CPU_SUP_AMD && X86_MCE_AMD
default y
---help---
Enable this option if you want to decode Machine Check Exceptions
@@ -170,8 +170,7 @@ config EDAC_I5400
config EDAC_I7CORE
tristate "Intel i7 Core (Nehalem) processors"
- depends on EDAC_MM_EDAC && PCI && X86
- select EDAC_MCE
+ depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL
help
Support for error detection and correction the Intel
i7 Core (Nehalem) Integrated Memory Controller that exists on