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authorLinus Walleij <linus.walleij@linaro.org>2012-11-27 20:15:20 +0100
committerMike Turquette <mturquette@linaro.org>2012-12-04 10:33:53 -0800
commit2630b17b6ee47ac79b4f5120ac49105027f644ea (patch)
tree545b232915d024e2d03197715d0b8a6f97c4065c
parent1f61e5f143b578606389887887af549bc5554353 (diff)
clk: ux500: fix bit error
This fixes a bit error in the U8500 clock implementation: the unused p2_pclk12 registered at bit 12 in periphereral group 6 was defined as using bit 11 rather than bit 12. When walking over and disabling the unused clocks in the tree at late init time, p2_pclk12 was disabled, by effectively clearing the but for p2_pclk11 instead of bit 12 as it should have, thus disabling gpio block 6 and 7. Reported-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Philippe Begnic <philippe.begnic@st.com> Cc: stable@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--drivers/clk/ux500/u8500_clk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 64877e1588e..7d0e0258f20 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -326,7 +326,7 @@ void u8500_clk_init(void)
clk_register_clkdev(clk, NULL, "gpioblock1");
clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE,
- BIT(11), 0);
+ BIT(12), 0);
clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE,
BIT(0), 0);