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authorAlex Deucher <alexander.deucher@amd.com>2013-08-28 18:12:59 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 16:31:12 -0400
commit2ce529dac71ae7753981a587932d074fdb248608 (patch)
tree4e41ab114f1404642f6b44c7f5dced56ec6487a0
parent27c505ca84e164ec66ad55dcf3f5befaac83f10a (diff)
drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume
For powergating, we just need to re-init the registers, there is no need to restore the uvd BOs. This just adds needless work when powergating uvd for playback while the system is on. We only need to restore the uvd BOs on an actual resume from suspend or when the driver loads. This fixes multi-stream UVD playback on KB systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/cik.c13
-rw-r--r--drivers/gpu/drm/radeon/uvd_v4_2.c5
2 files changed, 8 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e336a31230e..79124f81c00 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7051,12 +7051,15 @@ static int cik_startup(struct radeon_device *rdev)
return r;
}
- r = uvd_v4_2_resume(rdev);
+ r = radeon_uvd_resume(rdev);
if (!r) {
- r = radeon_fence_driver_start_ring(rdev,
- R600_RING_TYPE_UVD_INDEX);
- if (r)
- dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
+ r = uvd_v4_2_resume(rdev);
+ if (!r) {
+ r = radeon_fence_driver_start_ring(rdev,
+ R600_RING_TYPE_UVD_INDEX);
+ if (r)
+ dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
+ }
}
if (r)
rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0;
diff --git a/drivers/gpu/drm/radeon/uvd_v4_2.c b/drivers/gpu/drm/radeon/uvd_v4_2.c
index d7e48078609..d04d5073eef 100644
--- a/drivers/gpu/drm/radeon/uvd_v4_2.c
+++ b/drivers/gpu/drm/radeon/uvd_v4_2.c
@@ -39,11 +39,6 @@ int uvd_v4_2_resume(struct radeon_device *rdev)
{
uint64_t addr;
uint32_t size;
- int r;
-
- r = radeon_uvd_resume(rdev);
- if (r)
- return r;
/* programm the VCPU memory controller bits 0-27 */
addr = rdev->uvd.gpu_addr >> 3;