diff options
author | Thierry Reding <treding@nvidia.com> | 2013-10-07 09:55:57 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2013-10-31 09:55:44 +0100 |
commit | 497c56a5817f1610ca189e1dc546934c7ce8eb7d (patch) | |
tree | c9a6e76e2d466c9dd77722333b217cb4fa5fab94 | |
parent | f8c3325584220fd7fb559f9867a926668ae5630c (diff) |
drm/tegra: Use symbolic names for gr2d registers
Instead of using magic numbers for the registers which contain memory
addresses in the firewall table, using symbolic names.
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | drivers/gpu/drm/tegra/gr2d.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/tegra/gr2d.h | 28 |
2 files changed, 42 insertions, 4 deletions
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c index 4e407e30da1..bbeedc24d00 100644 --- a/drivers/gpu/drm/tegra/gr2d.c +++ b/drivers/gpu/drm/tegra/gr2d.c @@ -18,8 +18,7 @@ #include "drm.h" #include "gem.h" - -#define GR2D_NUM_REGS 0x4d +#include "gr2d.h" struct gr2d { struct tegra_drm_client client; @@ -259,8 +258,19 @@ static const struct of_device_id gr2d_match[] = { }; static const u32 gr2d_addr_regs[] = { - 0x1a, 0x1b, 0x26, 0x2b, 0x2c, 0x2d, 0x31, 0x32, - 0x48, 0x49, 0x4a, 0x4b, 0x4c + GR2D_UA_BASE_ADDR, + GR2D_VA_BASE_ADDR, + GR2D_PAT_BASE_ADDR, + GR2D_DSTA_BASE_ADDR, + GR2D_DSTB_BASE_ADDR, + GR2D_DSTC_BASE_ADDR, + GR2D_SRCA_BASE_ADDR, + GR2D_SRCB_BASE_ADDR, + GR2D_SRC_BASE_ADDR_SB, + GR2D_DSTA_BASE_ADDR_SB, + GR2D_DSTB_BASE_ADDR_SB, + GR2D_UA_BASE_ADDR_SB, + GR2D_VA_BASE_ADDR_SB, }; static int gr2d_probe(struct platform_device *pdev) diff --git a/drivers/gpu/drm/tegra/gr2d.h b/drivers/gpu/drm/tegra/gr2d.h new file mode 100644 index 00000000000..4d7304fb015 --- /dev/null +++ b/drivers/gpu/drm/tegra/gr2d.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2013 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef TEGRA_GR2D_H +#define TEGRA_GR2D_H + +#define GR2D_UA_BASE_ADDR 0x1a +#define GR2D_VA_BASE_ADDR 0x1b +#define GR2D_PAT_BASE_ADDR 0x26 +#define GR2D_DSTA_BASE_ADDR 0x2b +#define GR2D_DSTB_BASE_ADDR 0x2c +#define GR2D_DSTC_BASE_ADDR 0x2d +#define GR2D_SRCA_BASE_ADDR 0x31 +#define GR2D_SRCB_BASE_ADDR 0x32 +#define GR2D_SRC_BASE_ADDR_SB 0x48 +#define GR2D_DSTA_BASE_ADDR_SB 0x49 +#define GR2D_DSTB_BASE_ADDR_SB 0x4a +#define GR2D_UA_BASE_ADDR_SB 0x4b +#define GR2D_VA_BASE_ADDR_SB 0x4c + +#define GR2D_NUM_REGS 0x4d + +#endif |