diff options
| author | eric miao <eric.y.miao@gmail.com> | 2007-11-20 01:36:44 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-11-26 14:38:57 +0000 |
| commit | 52b2bd7f97e2677f8d6f5cef675f86bba732e860 (patch) | |
| tree | c47075b79d24bc9497662e5fa26f7d2afbdcee24 | |
| parent | 43b35f104d20c03fd1741d25c370a94485e2cae6 (diff) | |
[ARM] 4654/1: pxa: update default MFP register value
1. update default MFPR value to drive strength fast 3mA and edge
detection logic disabled
2. update impacted MFP_CFG_xxx() macros
Signed-off-by: bridge wu <bridge.wu@marvell.com>
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | include/asm-arm/arch-pxa/mfp.h | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h index ac4157af5a8..03c508d94f0 100644 --- a/include/asm-arm/arch-pxa/mfp.h +++ b/include/asm-arm/arch-pxa/mfp.h @@ -346,23 +346,31 @@ typedef uint32_t mfp_cfg_t; #define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff) #define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff) -#define MFPR_DEFAULT (0x0000) +/* + * MFP register defaults to + * drive strength fast 3mA (010'b) + * edge detection logic disabled + * alternate function 0 + */ +#define MFPR_DEFAULT (0x0840) #define MFP_CFG(pin, af) \ ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af)) #define MFP_CFG_DRV(pin, af, drv) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ + ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_DRV_MASK) |\ ((MFP_##drv) << 10) | (MFP_##af)) #define MFP_CFG_LPM(pin, af, lpm) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af) |\ + ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_LPM_MASK) |\ (((MFP_LPM_##lpm) & 0x3) << 7) |\ (((MFP_LPM_##lpm) & 0x4) << 12) |\ - (((MFP_LPM_##lpm) & 0x8) << 10)) + (((MFP_LPM_##lpm) & 0x8) << 10) |\ + (MFP_##af)) #define MFP_CFG_X(pin, af, drv, lpm) \ - ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ + ((MFP_PIN_##pin << 16) |\ + (MFPR_DEFAULT & ~(MFPR_DRV_MASK | MFPR_LPM_MASK)) |\ ((MFP_##drv) << 10) | (MFP_##af) |\ (((MFP_LPM_##lpm) & 0x3) << 7) |\ (((MFP_LPM_##lpm) & 0x4) << 12) |\ |