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authorHirokazu Takata <takata@linux-m32r.org>2007-08-20 20:53:50 +0900
committerHirokazu Takata <takata@linux-m32r.org>2007-09-06 11:10:56 +0900
commit7071b2914a540b43dfcad17f6892a8c115799d50 (patch)
treeeeb059350e481a1cfab731cf1c7dc2dbb2743532
parent33205613cd603fa4d80bb81464e60b909b7047e1 (diff)
m32r: Rename STI/CLI macros
The names of STI and CLI macros were derived from i386 arch historically, but their name are incomprehensible. So, for easy to understand, rename these macros to ENABLE_INTERRUPTS and DISABLE_INTERRUPTS, respectively. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
-rw-r--r--arch/m32r/kernel/entry.S16
-rw-r--r--include/asm-m32r/assembler.h16
2 files changed, 16 insertions, 16 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 42b08bfd46f..d4eaa2fd181 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -112,7 +112,7 @@
#define nr_syscalls ((syscall_table_size)/4)
#ifdef CONFIG_PREEMPT
-#define preempt_stop(x) CLI(x)
+#define preempt_stop(x) DISABLE_INTERRUPTS(x)
#else
#define preempt_stop(x)
#define resume_kernel restore_all
@@ -144,7 +144,7 @@ ret_from_intr:
#endif
beqz r4, resume_kernel
ENTRY(resume_userspace)
- CLI(r4) ; make sure we don't miss an interrupt
+ DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
; setting need_resched or sigpending
; between sampling and the iret
GET_THREAD_INFO(r8)
@@ -168,11 +168,11 @@ need_resched:
beqz r4, restore_all
LDIMM (r4, PREEMPT_ACTIVE)
st r4, @(TI_PRE_COUNT, r8)
- STI(r4)
+ ENABLE_INTERRUPTS(r4)
bl schedule
ldi r4, #0
st r4, @(TI_PRE_COUNT, r8)
- CLI(r4)
+ DISABLE_INTERRUPTS(r4)
bra need_resched
#endif
@@ -180,7 +180,7 @@ need_resched:
ENTRY(system_call)
SWITCH_TO_KERNEL_STACK
SAVE_ALL
- STI(r4) ; Enable interrupt
+ ENABLE_INTERRUPTS(r4) ; Enable interrupt
st sp, PTREGS(sp) ; implicit pt_regs parameter
cmpui r7, #NR_syscalls
bnc syscall_badsys
@@ -198,7 +198,7 @@ syscall_call:
jl r7 ; execute system call
st r0, R0(sp) ; save the return value
syscall_exit:
- CLI(r4) ; make sure we don't miss an interrupt
+ DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
; setting need_resched or sigpending
; between sampling and the iret
ld r9, @(TI_FLAGS, r8)
@@ -215,7 +215,7 @@ work_pending:
beqz r4, work_notifysig
work_resched:
bl schedule
- CLI(r4) ; make sure we don't miss an interrupt
+ DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
; setting need_resched or sigpending
; between sampling and the iret
ld r9, @(TI_FLAGS, r8)
@@ -257,7 +257,7 @@ syscall_exit_work:
ld r9, @(TI_FLAGS, r8)
and3 r4, r9, #_TIF_SYSCALL_TRACE
beqz r4, work_pending
- STI(r4) ; could let do_syscall_trace() call
+ ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
; schedule() instead
bl do_syscall_trace
bra resume_userspace
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index 47041d19d4a..26351539b5f 100644
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -52,27 +52,27 @@
.endm
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
setpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
clrpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
mvfc \reg, psw
or3 \reg, \reg, #0x0040
mvtc \reg, psw
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
mvfc \reg, psw
and3 \reg, \reg, #0xffbf
mvtc \reg, psw