diff options
| author | Alessandro Zummo <azummo-armlinux@towertech.it> | 2005-11-06 14:34:12 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-06 14:34:12 +0000 |
| commit | 84613387cb60bc760a4588822cd61fb88e1d7fad (patch) | |
| tree | 66f945e84fe66dafa5fb897223588353aed48860 | |
| parent | 8459c159f7de832eaf888398d2abf466c388dfa6 (diff) | |
[ARM] 3089/1: ixp4xx AHB/PCI endianness fix
Patch from Alessandro Zummo
This patch fixes AHB/PCI endianness problems when the
processor is in little-endian mode.
The patch configures the CSR register closely following the directives
in [1], paragraph 4.1, page 19.
According to the considerations in [1], page 11, while the AHB bus
supports both endian modes, on the IXP4XX it always uses big-endian.
The PCI bus is connected to the South AHB. A wrong setting in the CSR
register will thus cause a malfunctional PCI bus.
A schematic diagram of the bus interconnections on the IXP4XX
can be found in [1], page 18.
The patch has been verified to work on the NSLU2 in
both LE and BE modes.
The author is Peter Korsgaard.
[1] Intel® IXP4XX Product Line of Network Processors and IXC1100
Control Plane Processor:
Understanding Big Endian and Little Endian Modes
http://www.intel.com/design/network/applnots/25423701.pdf
Signed-off-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-ixp4xx/common-pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2b544363c07..9795da270e3 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -427,7 +427,7 @@ void __init ixp4xx_pci_preinit(void) #ifdef __ARMEB__ *PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE | PCI_CSR_PDS | PCI_CSR_ADS; #else - *PCI_CSR = PCI_CSR_IC; + *PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE; #endif pr_debug("DONE\n"); |