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authorKukjin Kim <kgene.kim@samsung.com>2011-01-04 17:45:18 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-01-04 18:27:43 +0900
commit96ee39c445243dc58b71d72456a5bd19d9b04f31 (patch)
tree57c7dd0f97fffa1644c1517382ef776be8ac881d
parent1526631d0255d63b981a374a6623893032b04af0 (diff)
ARM: S5PC100: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-s5pc100/clock.c16
1 files changed, 3 insertions, 13 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 2d4a761a516..0305e9b8282 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -396,7 +396,7 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable)
* recommended to keep the following clocks disabled until the driver requests
* for enabling the clock.
*/
-static struct clk init_clocks_disable[] = {
+static struct clk init_clocks_off[] = {
{
.name = "cssys",
.id = -1,
@@ -1381,8 +1381,6 @@ static struct clk *clks[] __initdata = {
void __init s5pc100_register_clocks(void)
{
- struct clk *clkp;
- int ret;
int ptr;
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
@@ -1393,16 +1391,8 @@ void __init s5pc100_register_clocks(void)
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
- clkp = init_clocks_disable;
- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
- ret = s3c24xx_register_clock(clkp);
- if (ret < 0) {
- printk(KERN_ERR "Failed to register clock %s (%d)\n",
- clkp->name, ret);
- }
- (clkp->enable)(clkp, 0);
- }
+ s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+ s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_pwmclk_init();
}