diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-12 19:27:09 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-17 10:10:00 +0200 |
| commit | a37b9b349ef26cb44f0e8d59c3efbcd9485018b4 (patch) | |
| tree | 4cfcba7f41720c47b26b20ea237221fe6532d27b | |
| parent | dcdaed6eae0d7ed0c68aaa1ebfceb242625b3bf0 (diff) | |
drm/i915/ns2501: kill pll A enabling hack
With the pipe A quirk properly fixed up for i830M, this shouldn't be
required any longer.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/dvo_ns2501.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
2 files changed, 1 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c index 1a0bad9a5fa..6bd383dfbb0 100644 --- a/drivers/gpu/drm/i915/dvo_ns2501.c +++ b/drivers/gpu/drm/i915/dvo_ns2501.c @@ -75,11 +75,6 @@ struct ns2501_priv { #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) /* - * Include the PLL launcher prototype - */ -extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); - -/* * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens * laptops does not react on the i2c bus unless * both the PLL is running and the display is configured in its native @@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo) I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768 I915_WRITE(FW_BLC, 0x1080304); - intel_enable_pll(dev_priv, 0); - I915_WRITE(DVOC, 0x90004084); } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dd760f43f57..a55f6642be2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1432,7 +1432,7 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, * * Unfortunately needed by dvo_ns2501 since the dvo depends on it running. */ -void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) +static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) { int reg; u32 val; |