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authorPaul Mundt <lethal@linux-sh.org>2010-04-21 12:01:06 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-04-21 12:01:06 +0900
commita9079ca0cb15feda15e7a380092e02d5cd834148 (patch)
treefc47ebb5c005b21aafd1149cab98af09ea247282
parent3bd16668872b5ad0afb22f15ef6c800a8faf7532 (diff)
sh: Tidy CPU probing and fixup section annotations.
This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies up the unused return value, and stuffs it under __cpuinit in preparation for CPU hotplug. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/include/asm/cache.h4
-rw-r--r--arch/sh/include/asm/processor.h2
-rw-r--r--arch/sh/kernel/cpu/init.c4
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c5
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c4
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c4
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c4
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
8 files changed, 9 insertions, 22 deletions
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index 02df18ea960..e461d67f03c 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -38,14 +38,10 @@ struct cache_info {
* 2. those in the physical page number.
*/
unsigned int alias_mask;
-
unsigned int n_aliases; /* Number of aliases */
unsigned long flags;
};
-
-int __init detect_cpu_and_cache_system(void);
-
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHE_H */
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 9605e062840..c2be22505fe 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -102,6 +102,8 @@ struct task_struct;
extern struct pt_regs fake_swapper_regs;
+extern void cpu_probe(void);
+
/* arch/sh/kernel/process.c */
extern unsigned int xstate_size;
extern void free_thread_xstate(struct task_struct *);
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index c736422344e..ffaa00a2216 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -293,14 +293,14 @@ static inline void __init dsp_init(void) { }
* subtype and initial configuration will all be done.
*
* Each processor family is still responsible for doing its own probing
- * and cache configuration in detect_cpu_and_cache_system().
+ * and cache configuration in cpu_probe().
*/
asmlinkage void __init sh_cpu_init(void)
{
current_thread_info()->cpu = hard_smp_processor_id();
/* First, probe the CPU */
- detect_cpu_and_cache_system();
+ cpu_probe();
if (current_cpu_data.type == CPU_SH_NONE)
panic("Unknown CPU");
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 1db6d888388..bab8e75958a 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-int __init detect_cpu_and_cache_system(void)
+void __cpuinit cpu_probe(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7619)
boot_cpu_data.type = CPU_SH7619;
@@ -30,7 +30,4 @@ int __init detect_cpu_and_cache_system(void)
boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
boot_cpu_data.icache = boot_cpu_data.dcache;
boot_cpu_data.family = CPU_FAMILY_SH2;
-
- return 0;
}
-
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6825d650716..48e97a2a0c8 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -13,7 +13,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-int __init detect_cpu_and_cache_system(void)
+void __cpuinit cpu_probe(void)
{
boot_cpu_data.family = CPU_FAMILY_SH2A;
@@ -51,6 +51,4 @@ int __init detect_cpu_and_cache_system(void)
* on the cache info.
*/
boot_cpu_data.icache = boot_cpu_data.dcache;
-
- return 0;
}
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 295ec4c99e9..bf23c322e16 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
#include <asm/cache.h>
#include <asm/io.h>
-int detect_cpu_and_cache_system(void)
+void __cpuinit cpu_probe(void)
{
unsigned long addr0, addr1, data0, data1, data2, data3;
@@ -108,6 +108,4 @@ int detect_cpu_and_cache_system(void)
boot_cpu_data.icache = boot_cpu_data.dcache;
boot_cpu_data.family = CPU_FAMILY_SH3;
-
- return 0;
}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 822977a06d8..d180f16281e 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -15,7 +15,7 @@
#include <asm/processor.h>
#include <asm/cache.h>
-int __init detect_cpu_and_cache_system(void)
+void __cpuinit cpu_probe(void)
{
unsigned long pvr, prr, cvr;
unsigned long size;
@@ -251,6 +251,4 @@ int __init detect_cpu_and_cache_system(void)
boot_cpu_data.scache.linesz);
}
}
-
- return 0;
}
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 521d05b3f7b..9e882409e4e 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -17,7 +17,7 @@
#include <asm/cache.h>
#include <asm/tlb.h>
-int __init detect_cpu_and_cache_system(void)
+void __cpuinit cpu_probe(void)
{
unsigned long long cir;
@@ -72,6 +72,4 @@ int __init detect_cpu_and_cache_system(void)
/* Setup some I/D TLB defaults */
sh64_tlb_init();
-
- return 0;
}