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authorXiangliang Yu <yuxiangl@marvell.com>2011-09-29 00:34:32 -0700
committerJames Bottomley <JBottomley@Parallels.com>2011-10-02 13:15:04 -0500
commitaa117dd14372e1b0bed651af2db1be670b595032 (patch)
treeb1156f20fdf22c9ac5bac962227d067dd87179b4
parent07f098e6f4a9a488605d6a3a13ce2805023a0384 (diff)
[SCSI] mvsas: change SL mode0 register value
-- change connection behavior -- set bit8 to 1 for performance tuning -- set bit0 to 0 to enable retry for no_dest reject case. Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
-rw-r--r--drivers/scsi/mvsas/mv_94xx.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/scsi/mvsas/mv_94xx.c b/drivers/scsi/mvsas/mv_94xx.c
index ce4e970bced..016d3d41f23 100644
--- a/drivers/scsi/mvsas/mv_94xx.c
+++ b/drivers/scsi/mvsas/mv_94xx.c
@@ -510,6 +510,14 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
tmp |= CINT_PHY_MASK;
mw32(MVS_INT_MASK, tmp);
+ /* change the connection open-close behavior (bit 9)
+ * set bit8 to 1 for performance tuning */
+ tmp = mvs_cr32(mvi, CMD_SL_MODE0);
+ tmp |= 0x00000300;
+ /* set bit0 to 0 to enable retry for no_dest reject case */
+ tmp &= 0xFFFFFFFE;
+ mvs_cw32(mvi, CMD_SL_MODE0, tmp);
+
/* Enable SRS interrupt */
mw32(MVS_INT_MASK_SRS_0, 0xFFFF);