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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:39 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:39 -0400
commitabc848c182960118fbb7cdae397b5608c5bcef1b (patch)
treef34bdf4cea629521d329967b7cf73b39704cb562
parent05dda977f2574c3341abef9b74c27d2b362e1e3a (diff)
introduce mbus DRAM target info abstraction
Introduce struct mbus_dram_target_info, which will be used for passing information about the mbus target ID of the DDR unit, and mbus target attribute, base address and size for each of the DRAM chip selects from the platform code to peripheral drivers. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
-rw-r--r--include/linux/mbus.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
new file mode 100644
index 00000000000..c11ff293254
--- /dev/null
+++ b/include/linux/mbus.h
@@ -0,0 +1,36 @@
+/*
+ * Marvell MBUS common definitions.
+ *
+ * Copyright (C) 2008 Marvell Semiconductor
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __LINUX_MBUS_H
+#define __LINUX_MBUS_H
+
+struct mbus_dram_target_info
+{
+ /*
+ * The 4-bit MBUS target ID of the DRAM controller.
+ */
+ u8 mbus_dram_target_id;
+
+ /*
+ * The base address, size, and MBUS attribute ID for each
+ * of the possible DRAM chip selects. Peripherals are
+ * required to support at least 4 decode windows.
+ */
+ int num_cs;
+ struct mbus_dram_window {
+ u8 cs_index;
+ u8 mbus_attr;
+ u32 base;
+ u32 size;
+ } cs[4];
+};
+
+
+#endif