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authorDavid Daney <ddaney@caviumnetworks.com>2011-04-27 10:54:21 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-03 10:09:31 -0700
commitbf5417152154038bbae429e2357731b1dad03328 (patch)
tree4fd2b96a78e1ff270160400af4dce67953bef622
parentf5ced99725d05f521ef0f597e688c19835e59c55 (diff)
usb: octeon2-common.c: Configure ports for proper electrical characteristics.
Additional PHY tuning is needed to obtain compliant 'eye' diagram electrical characteristics. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/usb/host/octeon2-common.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/usb/host/octeon2-common.c b/drivers/usb/host/octeon2-common.c
index 5a0feed0356..aef6364d631 100644
--- a/drivers/usb/host/octeon2-common.c
+++ b/drivers/usb/host/octeon2-common.c
@@ -176,8 +176,10 @@ end_clock:
for (i = 0; i <= 1; i++) {
port_ctl_status.u64 =
cvmx_read_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0));
- /* Set txvreftune to 15 to obtain complient 'eye' diagram. */
+ /* Set txvreftune to 15 to obtain compliant 'eye' diagram. */
port_ctl_status.s.txvreftune = 15;
+ port_ctl_status.s.txrisetune = 1;
+ port_ctl_status.s.txpreemphasistune = 1;
cvmx_write_csr(CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(i, 0),
port_ctl_status.u64);
}