diff options
| author | Borislav Petkov <bp@alien8.de> | 2011-05-31 22:21:52 +0200 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-06-03 14:38:51 -0700 |
| commit | cac0e0a78f722abd85b7f8d614ee0820f7672f58 (patch) | |
| tree | c76b60de050278abbc9efec9cd3dba57530153c3 | |
| parent | a268fcfaa6ab2ef740fda5ecf947aca45ccd535d (diff) | |
x86, asm: Flip SAVE_ARGS arguments logic
This saves us the else part of the conditional statement in the macro.
No functionality change.
Signed-off-by: Borislav Petkov <bp@alien8.de>
Link: http://lkml.kernel.org/r/1306873314-32523-3-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| -rw-r--r-- | arch/x86/ia32/ia32entry.S | 6 | ||||
| -rw-r--r-- | arch/x86/include/asm/calling.h | 8 | ||||
| -rw-r--r-- | arch/x86/kernel/entry_64.S | 2 |
3 files changed, 7 insertions, 9 deletions
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index c1870dddd32..c5435dcea15 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -143,7 +143,7 @@ ENTRY(ia32_sysenter_target) CFI_REL_OFFSET rip,0 pushq_cfi %rax cld - SAVE_ARGS 0,0,1 + SAVE_ARGS 0,1,0 /* no need to do an access_ok check here because rbp has been 32bit zero extended */ 1: movl (%rbp),%ebp @@ -289,7 +289,7 @@ ENTRY(ia32_cstar_target) * disabled irqs and here we enable it straight after entry: */ ENABLE_INTERRUPTS(CLBR_NONE) - SAVE_ARGS 8,1,1 + SAVE_ARGS 8,0,0 movl %eax,%eax /* zero extension */ movq %rax,ORIG_RAX-ARGOFFSET(%rsp) movq %rcx,RIP-ARGOFFSET(%rsp) @@ -419,7 +419,7 @@ ENTRY(ia32_syscall) cld /* note the registers are not zero extended to the sf. this could be a problem. */ - SAVE_ARGS 0,0,1 + SAVE_ARGS 0,1,0 GET_THREAD_INFO(%r10) orl $TS_COMPAT,TI_status(%r10) testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h index b67e06c4710..b0b7d90d305 100644 --- a/arch/x86/include/asm/calling.h +++ b/arch/x86/include/asm/calling.h @@ -85,22 +85,20 @@ For 32-bit we have the following conventions - kernel is built with #define ARGOFFSET R11 #define SWFRAME ORIG_RAX - .macro SAVE_ARGS addskip=0, norcx=0, nor891011=0 + .macro SAVE_ARGS addskip=0, save_rcx=1, save_r891011=1 subq $9*8+\addskip, %rsp CFI_ADJUST_CFA_OFFSET 9*8+\addskip movq_cfi rdi, 8*8 movq_cfi rsi, 7*8 movq_cfi rdx, 6*8 - .if \norcx - .else + .if \save_rcx movq_cfi rcx, 5*8 .endif movq_cfi rax, 4*8 - .if \nor891011 - .else + .if \save_r891011 movq_cfi r8, 3*8 movq_cfi r9, 2*8 movq_cfi r10, 1*8 diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 8a445a0c989..e5ece6b6e71 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -473,7 +473,7 @@ ENTRY(system_call_after_swapgs) * and short: */ ENABLE_INTERRUPTS(CLBR_NONE) - SAVE_ARGS 8,1 + SAVE_ARGS 8,0 movq %rax,ORIG_RAX-ARGOFFSET(%rsp) movq %rcx,RIP-ARGOFFSET(%rsp) CFI_REL_OFFSET rip,RIP-ARGOFFSET |