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authorPaul Burton <paul.burton@imgtec.com>2014-03-24 10:19:34 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-31 18:17:13 +0200
commitcd217546602dbfe96c3f8e8025eb750fadf1ab4f (patch)
treedc34f45668bf59f3c674a8dc868971bf59bdfe3a
parentb966087b5145e044b033ea6bb6c16a3b5dc4c48e (diff)
MIPS: CM: use __raw_ memory access functions
The CM registers use native endianness, so using plain readl & writel will produce incorrect results on big endian systems. Reported-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6656/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mips-cm.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index 12cae5e294c..6a9d2dd005c 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -96,13 +96,13 @@ static inline u32 *addr_gcr_##name(void) \
\
static inline u32 read_gcr_##name(void) \
{ \
- return readl(addr_gcr_##name()); \
+ return __raw_readl(addr_gcr_##name()); \
}
#define BUILD_CM__W(name, off) \
static inline void write_gcr_##name(u32 value) \
{ \
- writel(value, addr_gcr_##name()); \
+ __raw_writel(value, addr_gcr_##name()); \
}
#define BUILD_CM_RW(name, off) \