diff options
author | Steven J. Hill <sjhill@mips.com> | 2012-11-14 23:34:17 -0600 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 18:15:24 +0100 |
commit | d7ea335c05ba7c013615d1e0d5a71459eb4195e8 (patch) | |
tree | 333f0cb8edd150b6c967bffacad07c03fea393da | |
parent | dcb96a4e36425d563cefd44a20d3386e02a547f3 (diff) |
MIPS: Remove usage of CSRC_R4K_LIB config option.
Manuel Lauss <manuel.lauss@gmail.com> writes:
I introduced it as a fallback because early revisions of Alchemy hardware
we shipped had a non-functional 32kHz timer and had to rely on the r4k
timer instead. Previously the r4k timer was initialized regardless, but
it's useless with the "wait" instruction.
So long story short: I need either the on-chip 32kHz timer OR the r4k
timer if the 32kHz one is unusable, but not both, and r4k timer is useless
when au1k_idle is in use.
The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm
not against removing R4K_LIB symbols.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/Kconfig | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/time.h | 2 | ||||
-rw-r--r-- | arch/mips/kernel/Makefile | 2 |
3 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9b3759eef95..b04b4916aa3 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -55,7 +55,7 @@ config MIPS_ALCHEMY bool "Alchemy processor based machines" select 64BIT_PHYS_ADDR select CEVT_R4K_LIB - select CSRC_R4K_LIB + select CSRC_R4K select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL @@ -948,11 +948,7 @@ config CSRC_IOASIC config CSRC_POWERTV bool -config CSRC_R4K_LIB - bool - config CSRC_R4K - select CSRC_R4K_LIB bool config CSRC_SB1250 diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index bc14447e69b..6be93a468ec 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h @@ -71,7 +71,7 @@ static inline int mips_clockevent_init(void) /* * Initialize the count register as a clocksource */ -#ifdef CONFIG_CSRC_R4K_LIB +#ifdef CONFIG_CSRC_R4K extern int init_r4k_clocksource(void); #endif diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 764597b5fb5..d9abe17b355 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -25,7 +25,7 @@ obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o -obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o +obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o obj-$(CONFIG_SYNC_R4K) += sync-r4k.o |