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authorVineet Gupta <vgupta@synopsys.com>2013-03-30 15:07:47 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-04-09 17:27:00 +0530
commitfbf8e13d31bafd1fd1135627b1eaaf70520cb8ab (patch)
treebb25980836831934977a6d72ad856292ee9bc8ce
parent30ecee8cdd05415e5602bd755d9210e1c5a5b64d (diff)
ARC: [kbuild] Allow platforms to disable LLSC for !SMP as well
Currently ARC_HAS_LLSC can be influenced by platform for SMP only using ARC_HAS_COH_LLSC. For !SMP it defaults to "y". It turns out that some customers can't support it all, even in UP. So we change the semantics, and use a negative dependency ARC_CANT_LLSC. Any platform (independent of SMP or !SMP) can select it to disable LLSC. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/Kconfig10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index e6f4eca09ee..44541f14c69 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -134,9 +134,6 @@ if SMP
config ARC_HAS_COH_CACHES
def_bool n
-config ARC_HAS_COH_LLSC
- def_bool n
-
config ARC_HAS_COH_RTSC
def_bool n
@@ -304,6 +301,9 @@ config ARC_FPU_SAVE_RESTORE
based on actual usage of FPU by a task. Thus our implemn does
this for all tasks in system.
+config ARC_CANT_LLSC
+ def_bool n
+
menuconfig ARC_CPU_REL_4_10
bool "Enable support for Rel 4.10 features"
default n
@@ -314,9 +314,7 @@ menuconfig ARC_CPU_REL_4_10
config ARC_HAS_LLSC
bool "Insn: LLOCK/SCOND (efficient atomic ops)"
default y
- depends on ARC_CPU_770
- # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics
- depends on !SMP || ARC_HAS_COH_LLSC
+ depends on ARC_CPU_770 && !ARC_CANT_LLSC
config ARC_HAS_SWAPE
bool "Insn: SWAPE (endian-swap)"