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author | Marcelo Tosatti <mtosatti@redhat.com> | 2013-05-03 12:45:19 -0300 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2013-05-03 12:45:19 -0300 |
commit | dfd2bb8426e203a7a97cd9b2d494d43d8df2cf8a (patch) | |
tree | ca783d964d6b3dfe85e0410cdc51bb89fb44aabd /Documentation | |
parent | 03b28f8133165dbe4cd922054d599e26b8119508 (diff) | |
parent | d4e071ce6acf8d5eddb7615a953193a8b0ad7c38 (diff) |
Merge branch 'kvm-arm-for-3.10' of git://github.com/columbia/linux-kvm-arm into queue
* 'kvm-arm-for-3.10' of git://github.com/columbia/linux-kvm-arm:
ARM: KVM: iterate over all CPUs for CPU compatibility check
KVM: ARM: Fix spelling in error message
ARM: KVM: define KVM_ARM_MAX_VCPUS unconditionally
KVM: ARM: Fix API documentation for ONE_REG encoding
ARM: KVM: promote vfp_host pointer to generic host cpu context
ARM: KVM: add architecture specific hook for capabilities
ARM: KVM: perform HYP initilization for hotplugged CPUs
ARM: KVM: switch to a dual-step HYP init code
ARM: KVM: rework HYP page table freeing
ARM: KVM: enforce maximum size for identity mapped code
ARM: KVM: move to a KVM provided HYP idmap
ARM: KVM: fix HYP mapping limitations around zero
ARM: KVM: simplify HYP mapping population
ARM: KVM: arch_timer: use symbolic constants
ARM: KVM: add support for minimal host vs guest profiling
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/virtual/kvm/api.txt | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 03492f95ed3..5f91eda9164 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1814,22 +1814,22 @@ ARM registers are mapped using the lower 32 bits. The upper 16 of that is the register group type, or coprocessor number: ARM core registers have the following id bit patterns: - 0x4002 0000 0010 <index into the kvm_regs struct:16> + 0x4020 0000 0010 <index into the kvm_regs struct:16> ARM 32-bit CP15 registers have the following id bit patterns: - 0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> + 0x4020 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> ARM 64-bit CP15 registers have the following id bit patterns: - 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> + 0x4030 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> ARM CCSIDR registers are demultiplexed by CSSELR value: - 0x4002 0000 0011 00 <csselr:8> + 0x4020 0000 0011 00 <csselr:8> ARM 32-bit VFP control registers have the following id bit patterns: - 0x4002 0000 0012 1 <regno:12> + 0x4020 0000 0012 1 <regno:12> ARM 64-bit FP registers have the following id bit patterns: - 0x4002 0000 0012 0 <regno:12> + 0x4030 0000 0012 0 <regno:12> 4.69 KVM_GET_ONE_REG |