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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-12-16 02:04:49 -0800 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-12-16 02:04:49 -0800 |
| commit | 348324c5b10bcba8d9daabdfb85a6927311be34f (patch) | |
| tree | d06ca3a264407a14a1f36c1b798d6dc0dc1582d8 /arch/arc/include/asm/cache.h | |
| parent | 1e63bd9cc43db5400a1423a7ec8266b4e7c54bd0 (diff) | |
| parent | 319e2e3f63c348a9b66db4667efa73178e18b17d (diff) | |
Merge tag 'v3.13-rc4' into next
Synchronize with mainline to bring in the new keycode definitions and
new hwmon API.
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index e4abdaac6f9..2fd3162ec4d 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -17,13 +17,7 @@ #endif #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -/* For a rare case where customers have differently config I/D */ -#define ARC_ICACHE_LINE_LEN L1_CACHE_BYTES -#define ARC_DCACHE_LINE_LEN L1_CACHE_BYTES - -#define ICACHE_LINE_MASK (~(ARC_ICACHE_LINE_LEN - 1)) -#define DCACHE_LINE_MASK (~(ARC_DCACHE_LINE_LEN - 1)) +#define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1)) /* * ARC700 doesn't cache any access in top 256M. |