Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

Last pile of stuff for 3.7, essentially just a bunch of bigger fixes and a
few less intrusive features:

- cpu freq interface in sysfs from Ben
- cpu edp fixes and some related cleanups
- write-combining ptes for pre-gen6 (Chris)
- basic CADL support (Peter Wu), this fixes quite a few issues with
  backlights ...
- rework of the gem backing pages handling (preps for stolen mem handling)
  from Chris
- some more cleanup-fallout from the modeset-rework

On top of that I've done a backmerge of -rc7(since the conflicts got too
messy and I've pushed out broken merged trees too often). I've also
included 3 fixes on top of what QA beat on:

- Fix for a infoframe handling regression in 3.5 - infoframe blows up too
  often and 3.6 is pretty much done, so I'd like to merge that through
  -next and the stable process and give it more exposure before it lands
  in a stable tree.
- ioctl cosmetics^Wspelling fix in the structs (userspace won't be
  affected, since all existing userspace uses private copies of the ioctl
  struct definitions, and the struct layout itself is abi compatible).
- Bugfix for a regression introduced in this pull's testing cycle.

* 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel: (695 commits)
  drm/i915: Wrap external callers to IPS state with appropriate locks
  drm/i915: s/cacheing/caching/
  drm/i915: make sure we write all the DIP data bytes
  drm/i915: BUG() on unexpected HDMI register
  ...

1 files changed, 5 insertions, 0 deletions

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b8c64b80baf..bc67cbff394 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
 		mcrne	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
 #endif
 		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
+		bic	r0, r0, #1 << 28	@ clear SCTLR.TRE
 		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
 		orr	r0, r0, #0x003c		@ write buffer
 #ifdef CONFIG_MMU
 #ifdef CONFIG_CPU_ENDIAN_BE8
 		orr	r0, r0, #1 << 25	@ big-endian page tables
 #endif
+		mrcne   p15, 0, r6, c2, c0, 2   @ read ttb control reg
 		orrne	r0, r0, #1		@ MMU enabled
 		movne	r1, #0xfffffffd		@ domain 0 = client
+		bic     r6, r6, #1 << 31        @ 32-bit translation system
+		bic     r6, r6, #3 << 0         @ use only ttbr0
 		mcrne	p15, 0, r3, c2, c0, 0	@ load page table pointer
 		mcrne	p15, 0, r1, c3, c0, 0	@ load domain access control
+		mcrne   p15, 0, r6, c2, c0, 2   @ load ttb control
 #endif
 		mcr	p15, 0, r0, c7, c5, 4	@ ISB
 		mcr	p15, 0, r0, c1, c0, 0	@ load control register