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authorStephen Warren <swarren@nvidia.com>2013-04-04 16:08:06 -0600
committerStephen Warren <swarren@nvidia.com>2013-04-04 16:08:06 -0600
commit8aa15d82df291b398d604b527a20310f10c1c706 (patch)
tree2e72fa6d6cdcb62c63f31bbd0f15a28909db7625 /arch/arm/boot/dts/tegra20.dtsi
parent8bb9660418e05bb1845ac1a2428444d78e322cc7 (diff)
parent4d82d0587b4a964ea3a7c73aa044b433000527dd (diff)
Merge branch 'for-3.10/soc' into for-3.10/clk
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 48d00a099ce..0dad7007bd4 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -145,6 +145,7 @@
0 1 0x04
0 41 0x04
0 42 0x04>;
+ clocks = <&tegra_car 5>;
};
tegra_car: clock {
@@ -304,6 +305,7 @@
compatible = "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
interrupts = <0 2 0x04>;
+ clocks = <&tegra_car 4>;
};
i2c@7000c000 {
@@ -416,6 +418,8 @@
pmc {
compatible = "nvidia,tegra20-pmc";
reg = <0x7000e400 0x400>;
+ clocks = <&tegra_car 110>, <&clk32k_in>;
+ clock-names = "pclk", "clk32k_in";
};
memory-controller@7000f000 {