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authorThierry Reding <thierry.reding@avionic-design.de>2013-08-09 16:49:23 +0200
committerStephen Warren <swarren@nvidia.com>2013-08-12 14:19:24 -0600
commit1798efda3cbc7f658a685e7ace2f5ad4bf1ae238 (patch)
tree971d3a90a2b5db3946af093102d20034eec621d9 /arch/arm/boot
parent722afc1747faf45987cbe12629982afc8db2d09f (diff)
ARM: tegra: trimslice: Initialize PCIe from DT
With the device tree support in place, probe the PCIe controller from the device tree and remove the corresponding workaround in the board file. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index d8bc976f012..22e227f87e4 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -310,6 +310,16 @@
nvidia,sys-clock-req-active-high;
};
+ pcie-controller {
+ status = "okay";
+ pex-clk-supply = <&pci_clk_reg>;
+ vdd-supply = <&pci_vdd_reg>;
+
+ pci@1,0 {
+ status = "okay";
+ };
+ };
+
usb@c5000000 {
status = "okay";
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
@@ -413,6 +423,24 @@
enable-active-high;
gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
};
+
+ pci_clk_reg: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "pci_clk";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ pci_vdd_reg: regulator@4 {
+ compatible = "regulator-fixed";
+ reg = <4>;
+ regulator-name = "pci_vdd";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ };
};
sound {