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authorStephen Warren <swarren@nvidia.com>2011-09-20 10:46:26 -0600
committerArnd Bergmann <arnd@arndb.de>2011-09-22 14:44:28 +0000
commit6111d50c5885f6ba00dc935e44bcbbcd63b3915d (patch)
tree07da3418e154f164964bec3a343c3f123e521fdc /arch/arm/boot
parentd93dc5c4478c1fd5de85a3e8aece9aad7bbae044 (diff)
arm/dt: Tegra: Add support-8bit to SDHCI nodes
For Seaboard's internal eMMC, this makes the difference between a 5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any measurable difference on my cheap/slow ~2MB/s card. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts1
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts4
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index e5818668d09..0e225b86b65 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -66,5 +66,6 @@
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ support-8bit;
};
};
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 64cedca6fc7..a72299b8e66 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -25,4 +25,8 @@
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
};
+
+ sdhci@c8000600 {
+ support-8bit;
+ };
};