diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/arm/common/gic.c | |
| parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
| parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/arm/common/gic.c')
| -rw-r--r-- | arch/arm/common/gic.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 3e1714c6523..337741f734a 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -109,7 +109,7 @@ static void gic_unmask_irq(unsigned int irq) } #ifdef CONFIG_SMP -static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) +static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) { void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); unsigned int shift = (irq % 4) * 8; @@ -117,11 +117,13 @@ static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) u32 val; spin_lock(&irq_controller_lock); - irq_desc[irq].cpu = cpu; + irq_desc[irq].node = cpu; val = readl(reg) & ~(0xff << shift); val |= 1 << (cpu + shift); writel(val, reg); spin_unlock(&irq_controller_lock); + + return 0; } #endif |