diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-11-09 13:18:01 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-11-24 15:55:17 +0900 |
| commit | e55bc55867585e6628359fd5496316576fe58a2f (patch) | |
| tree | 6c249dc0d5d20121ec3219dbcd74eee438dd5155 /arch/arm/configs/ks8695_defconfig | |
| parent | 6802cdc58d4fe66cffd6cd04ee55e65dd61eeeeb (diff) | |
irqchip: renesas-intc-irqpin: Fix register bitfield shift calculation
The SENSE register bitfield position is incorrectly computed for SoCs
that use 2-bit IRQ sense fields. Fix it.
This has been tested on the Marzen (H1) and Bockw (M1) boards.
This bug has been present since the renesas-intc-irqpin driver was
introduced by 443580486e3b9657 ("irqchip: Renesas INTC External IRQ pin
driver") in v3.10-rc1.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/configs/ks8695_defconfig')
0 files changed, 0 insertions, 0 deletions