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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2014-07-24 12:36:56 -0700
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2014-07-24 12:36:56 -0700
commitb9f12a5d97f652c77ef6803dccd0d40d1290f5be (patch)
tree8f58c8620ffef0d350a5ec022feda492a96b179a /arch/arm/include/asm/fixmap.h
parent9d8dc3e529a19e427fd379118acd132520935c5d (diff)
parent9a3c4145af32125c5ee39c0272662b47307a8323 (diff)
Merge tag 'v3.16-rc6' into next
Merge with mainline to bring in changes to MFD to allow merging ipaq-micro-ts driver.
Diffstat (limited to 'arch/arm/include/asm/fixmap.h')
-rw-r--r--arch/arm/include/asm/fixmap.h21
1 files changed, 4 insertions, 17 deletions
diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h
index bbae919bceb..74124b0d0d7 100644
--- a/arch/arm/include/asm/fixmap.h
+++ b/arch/arm/include/asm/fixmap.h
@@ -1,24 +1,11 @@
#ifndef _ASM_FIXMAP_H
#define _ASM_FIXMAP_H
-/*
- * Nothing too fancy for now.
- *
- * On ARM we already have well known fixed virtual addresses imposed by
- * the architecture such as the vector page which is located at 0xffff0000,
- * therefore a second level page table is already allocated covering
- * 0xfff00000 upwards.
- *
- * The cache flushing code in proc-xscale.S uses the virtual area between
- * 0xfffe0000 and 0xfffeffff.
- */
-
-#define FIXADDR_START 0xfff00000UL
-#define FIXADDR_TOP 0xfffe0000UL
+#define FIXADDR_START 0xffc00000UL
+#define FIXADDR_TOP 0xffe00000UL
#define FIXADDR_SIZE (FIXADDR_TOP - FIXADDR_START)
-#define FIX_KMAP_BEGIN 0
-#define FIX_KMAP_END (FIXADDR_SIZE >> PAGE_SHIFT)
+#define FIX_KMAP_NR_PTES (FIXADDR_SIZE >> PAGE_SHIFT)
#define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT))
#define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT)
@@ -27,7 +14,7 @@ extern void __this_fixmap_does_not_exist(void);
static inline unsigned long fix_to_virt(const unsigned int idx)
{
- if (idx >= FIX_KMAP_END)
+ if (idx >= FIX_KMAP_NR_PTES)
__this_fixmap_does_not_exist();
return __fix_to_virt(idx);
}