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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-11-12 10:58:59 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-11-12 10:58:59 +0000
commitdf762eccbadf87850fbee444d729e0f1b1e946f1 (patch)
tree1bf47bbbd4ea91e343f983b3b50ec2ec73a739e1 /arch/arm/include/asm/hardware/coresight.h
parentec1e20a02fe33b767ffcca8920a32211492416d7 (diff)
parent70d42126877b9faa272d446a6de5917614c28dd9 (diff)
Merge branch 'devel-stable' into for-next
Conflicts: arch/arm/include/asm/atomic.h arch/arm/include/asm/hardirq.h arch/arm/kernel/smp.c
Diffstat (limited to 'arch/arm/include/asm/hardware/coresight.h')
-rw-r--r--arch/arm/include/asm/hardware/coresight.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index 0cf7a6b842f..ad774f37c47 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -24,8 +24,8 @@
#define TRACER_TIMEOUT 10000
#define etm_writel(t, v, x) \
- (__raw_writel((v), (t)->etm_regs + (x)))
-#define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x)))
+ (writel_relaxed((v), (t)->etm_regs + (x)))
+#define etm_readl(t, x) (readl_relaxed((t)->etm_regs + (x)))
/* CoreSight Management Registers */
#define CSMR_LOCKACCESS 0xfb0
@@ -142,8 +142,8 @@
#define ETBFF_TRIGFL BIT(10)
#define etb_writel(t, v, x) \
- (__raw_writel((v), (t)->etb_regs + (x)))
-#define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x)))
+ (writel_relaxed((v), (t)->etb_regs + (x)))
+#define etb_readl(t, x) (readl_relaxed((t)->etb_regs + (x)))
#define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0)
#define etm_unlock(t) \