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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-08-05 10:27:13 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-08-05 10:27:13 +0100
commit7109561524dc57b95fd3f9b61547268b9b6db8ed (patch)
treedf08f565b2c616b7e68fe35cd428a8c5ba3bfcb1 /arch/arm/include/asm/mcpm.h
parent6bf755db4d5e7ccea61fb17727a183b9bd8945b1 (diff)
parent3bb70de692f70861f5c5729cd2b870d0104a7cc9 (diff)
Merge branches 'fixes' and 'misc' into for-next
Conflicts: arch/arm/kernel/iwmmxt.S arch/arm/mm/cache-l2x0.c arch/arm/mm/mmu.c
Diffstat (limited to 'arch/arm/include/asm/mcpm.h')
-rw-r--r--arch/arm/include/asm/mcpm.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h
index 94060adba17..57ff7f2a308 100644
--- a/arch/arm/include/asm/mcpm.h
+++ b/arch/arm/include/asm/mcpm.h
@@ -217,6 +217,22 @@ int __mcpm_cluster_state(unsigned int cluster);
int __init mcpm_sync_init(
void (*power_up_setup)(unsigned int affinity_level));
+/**
+ * mcpm_loopback - make a run through the MCPM low-level code
+ *
+ * @cache_disable: pointer to function performing cache disabling
+ *
+ * This exercises the MCPM machinery by soft resetting the CPU and branching
+ * to the MCPM low-level entry code before returning to the caller.
+ * The @cache_disable function must do the necessary cache disabling to
+ * let the regular kernel init code turn it back on as if the CPU was
+ * hotplugged in. The MCPM state machine is set as if the cluster was
+ * initialized meaning the power_up_setup callback passed to mcpm_sync_init()
+ * will be invoked for all affinity levels. This may be useful to initialize
+ * some resources such as enabling the CCI that requires the cache to be off, or simply for testing purposes.
+ */
+int __init mcpm_loopback(void (*cache_disable)(void));
+
void __init mcpm_smp_set_ops(void);
#else