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| author | James Bottomley <JBottomley@Parallels.com> | 2013-06-26 23:08:22 -0700 |
|---|---|---|
| committer | James Bottomley <JBottomley@Parallels.com> | 2013-06-26 23:08:22 -0700 |
| commit | a9e94ec3504ead4b87a929bc57f5aa99a6590437 (patch) | |
| tree | b6e7aaec0e844dc066e93296a85e5769542ef525 /arch/arm/include/asm/percpu.h | |
| parent | 36a279686bc02d340eb213a9f2a0b67e50de64b4 (diff) | |
| parent | 2884d4230867c8a46cf701214051e923301e7429 (diff) | |
Merge tag 'fcoe1' into fixes
This patch fixes a critical bug that was introduced in 3.9
related to VLAN tagging FCoE frames.
Diffstat (limited to 'arch/arm/include/asm/percpu.h')
| -rw-r--r-- | arch/arm/include/asm/percpu.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h index 968c0a14e0a..209e6504922 100644 --- a/arch/arm/include/asm/percpu.h +++ b/arch/arm/include/asm/percpu.h @@ -30,8 +30,15 @@ static inline void set_my_cpu_offset(unsigned long off) static inline unsigned long __my_cpu_offset(void) { unsigned long off; - /* Read TPIDRPRW */ - asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : : "memory"); + register unsigned long *sp asm ("sp"); + + /* + * Read TPIDRPRW. + * We want to allow caching the value, so avoid using volatile and + * instead use a fake stack read to hazard against barrier(). + */ + asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp)); + return off; } #define __my_cpu_offset __my_cpu_offset() |