summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-at91/setup.c
diff options
context:
space:
mode:
authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2013-05-15 10:26:50 -0400
committerKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2013-05-15 10:26:50 -0400
commit12e04ffcd93b25dfd726d46338c2ee7d23de556e (patch)
treef91479a62805619168994fd3ee55e3ffa23fc24e /arch/arm/mach-at91/setup.c
parent9eff37a8713939f218ab8bf0dc93f1d67af7b8b4 (diff)
parentf722406faae2d073cc1d01063d1123c35425939e (diff)
Merge tag 'v3.10-rc1' into stable/for-linus-3.10
Linux 3.10-rc1 * tag 'v3.10-rc1': (12273 commits) Linux 3.10-rc1 [SCSI] qla2xxx: Update firmware link in Kconfig file. [SCSI] iscsi class, qla4xxx: fix sess/conn refcounting when find fns are used [SCSI] sas: unify the pointlessly separated enums sas_dev_type and sas_device_type [SCSI] pm80xx: thermal, sas controller config and error handling update [SCSI] pm80xx: NCQ error handling changes [SCSI] pm80xx: WWN Modification for PM8081/88/89 controllers [SCSI] pm80xx: Changed module name and debug messages update [SCSI] pm80xx: Firmware flash memory free fix, with addition of new memory region for it [SCSI] pm80xx: SPC new firmware changes for device id 0x8081 alone [SCSI] pm80xx: Added SPCv/ve specific hardware functionalities and relevant changes in common files [SCSI] pm80xx: MSI-X implementation for using 64 interrupts [SCSI] pm80xx: Updated common functions common for SPC and SPCv/ve [SCSI] pm80xx: Multiple inbound/outbound queue configuration [SCSI] pm80xx: Added SPCv/ve specific ids, variables and modify for SPC [SCSI] lpfc: fix up Kconfig dependencies [SCSI] Handle MLQUEUE busy response in scsi_send_eh_cmnd dm cache: set config value dm cache: move config fns dm thin: generate event when metadata threshold passed ...
Diffstat (limited to 'arch/arm/mach-at91/setup.c')
-rw-r--r--arch/arm/mach-at91/setup.c57
1 files changed, 46 insertions, 11 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 4b678478cf9..e2f4bdd146d 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -105,28 +105,32 @@ static void __init soc_detect(u32 dbgu_base)
switch (socid) {
case ARCH_ID_AT91RM9200:
at91_soc_initdata.type = AT91_SOC_RM9200;
- if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
+ if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
at91_boot_soc = at91rm9200_soc;
break;
case ARCH_ID_AT91SAM9260:
at91_soc_initdata.type = AT91_SOC_SAM9260;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9260_soc;
break;
case ARCH_ID_AT91SAM9261:
at91_soc_initdata.type = AT91_SOC_SAM9261;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9261_soc;
break;
case ARCH_ID_AT91SAM9263:
at91_soc_initdata.type = AT91_SOC_SAM9263;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9263_soc;
break;
case ARCH_ID_AT91SAM9G20:
at91_soc_initdata.type = AT91_SOC_SAM9G20;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9260_soc;
break;
@@ -139,6 +143,7 @@ static void __init soc_detect(u32 dbgu_base)
case ARCH_ID_AT91SAM9RL64:
at91_soc_initdata.type = AT91_SOC_SAM9RL;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9rl_soc;
break;
@@ -151,11 +156,17 @@ static void __init soc_detect(u32 dbgu_base)
at91_soc_initdata.type = AT91_SOC_SAM9N12;
at91_boot_soc = at91sam9n12_soc;
break;
+
+ case ARCH_ID_SAMA5D3:
+ at91_soc_initdata.type = AT91_SOC_SAMA5D3;
+ at91_boot_soc = sama5d3_soc;
+ break;
}
/* at91sam9g10 */
if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
at91_soc_initdata.type = AT91_SOC_SAM9G10;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
at91_boot_soc = at91sam9261_soc;
}
/* at91sam9xe */
@@ -206,6 +217,23 @@ static void __init soc_detect(u32 dbgu_base)
break;
}
}
+
+ if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
+ switch (at91_soc_initdata.exid) {
+ case ARCH_EXID_SAMA5D31:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
+ break;
+ case ARCH_EXID_SAMA5D33:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
+ break;
+ case ARCH_EXID_SAMA5D34:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
+ break;
+ case ARCH_EXID_SAMA5D35:
+ at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
+ break;
+ }
+ }
}
static const char *soc_name[] = {
@@ -219,7 +247,8 @@ static const char *soc_name[] = {
[AT91_SOC_SAM9RL] = "at91sam9rl",
[AT91_SOC_SAM9X5] = "at91sam9x5",
[AT91_SOC_SAM9N12] = "at91sam9n12",
- [AT91_SOC_NONE] = "Unknown"
+ [AT91_SOC_SAMA5D3] = "sama5d3",
+ [AT91_SOC_UNKNOWN] = "Unknown",
};
const char *at91_get_soc_type(struct at91_socinfo *c)
@@ -241,7 +270,12 @@ static const char *soc_subtype_name[] = {
[AT91_SOC_SAM9X35] = "at91sam9x35",
[AT91_SOC_SAM9G25] = "at91sam9g25",
[AT91_SOC_SAM9X25] = "at91sam9x25",
- [AT91_SOC_SUBTYPE_NONE] = "Unknown"
+ [AT91_SOC_SAMA5D31] = "sama5d31",
+ [AT91_SOC_SAMA5D33] = "sama5d33",
+ [AT91_SOC_SAMA5D34] = "sama5d34",
+ [AT91_SOC_SAMA5D35] = "sama5d35",
+ [AT91_SOC_SUBTYPE_NONE] = "None",
+ [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
};
const char *at91_get_soc_subtype(struct at91_socinfo *c)
@@ -255,8 +289,8 @@ void __init at91_map_io(void)
/* Map peripherals */
iotable_init(&at91_io_desc, 1);
- at91_soc_initdata.type = AT91_SOC_NONE;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
+ at91_soc_initdata.type = AT91_SOC_UNKNOWN;
+ at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
soc_detect(AT91_BASE_DBGU0);
if (!at91_soc_is_detected())
@@ -267,8 +301,9 @@ void __init at91_map_io(void)
pr_info("AT91: Detected soc type: %s\n",
at91_get_soc_type(&at91_soc_initdata));
- pr_info("AT91: Detected soc subtype: %s\n",
- at91_get_soc_subtype(&at91_soc_initdata));
+ if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
+ pr_info("AT91: Detected soc subtype: %s\n",
+ at91_get_soc_subtype(&at91_soc_initdata));
if (!at91_soc_is_enabled())
panic("AT91: Soc not enabled");
@@ -333,7 +368,7 @@ static void at91_dt_rstc(void)
of_id = of_match_node(rstc_ids, np);
if (!of_id)
- panic("AT91: rtsc no restart function availlable\n");
+ panic("AT91: rtsc no restart function available\n");
arm_pm_restart = of_id->data;
@@ -353,7 +388,7 @@ static void at91_dt_ramc(void)
np = of_find_matching_node(NULL, ramc_ids);
if (!np)
- panic("unable to find compatible ram conroller node in dtb\n");
+ panic("unable to find compatible ram controller node in dtb\n");
at91_ramc_base[0] = of_iomap(np, 0);
if (!at91_ramc_base[0])
@@ -403,7 +438,7 @@ static void at91_dt_shdwc(void)
np = of_find_matching_node(NULL, shdwc_ids);
if (!np) {
- pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
+ pr_debug("AT91: unable to find compatible shutdown (shdwc) controller node in dtb\n");
return;
}
@@ -419,7 +454,7 @@ static void at91_dt_shdwc(void)
if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
if (reg > AT91_SHDW_CPTWK0_MAX) {
- pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
+ pr_warn("AT91: shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n",
reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
reg = AT91_SHDW_CPTWK0_MAX;
}