diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 13:54:56 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 13:54:56 +0900 |
| commit | 830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch) | |
| tree | e72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos4/setup-fimd0.c | |
| parent | e700e41d9abfbf9fee01e979a41b185695132c19 (diff) | |
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.
This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/setup-fimd0.c')
| -rw-r--r-- | arch/arm/mach-exynos4/setup-fimd0.c | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/arm/mach-exynos4/setup-fimd0.c b/arch/arm/mach-exynos4/setup-fimd0.c deleted file mode 100644 index 07a6dbeecdd..00000000000 --- a/arch/arm/mach-exynos4/setup-fimd0.c +++ /dev/null @@ -1,43 +0,0 @@ -/* linux/arch/arm/mach-exynos4/setup-fimd0.c - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Base Exynos4 FIMD 0 configuration - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/fb.h> -#include <linux/gpio.h> - -#include <plat/gpio-cfg.h> -#include <plat/regs-fb-v4.h> - -#include <mach/map.h> - -void exynos4_fimd0_gpio_setup_24bpp(void) -{ - unsigned int reg; - - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2)); - - /* - * Set DISPLAY_CONTROL register for Display path selection. - * - * DISPLAY_CONTROL[1:0] - * --------------------- - * 00 | MIE - * 01 | MDINE - * 10 | FIMD : selected - * 11 | FIMD - */ - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg |= (1 << 1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); -} |