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authorMarc Zyngier <marc.zyngier@arm.com>2011-09-06 10:23:45 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2011-11-15 18:14:00 +0000
commit041f777c93bab29565d999a292b9b9b533fe6f5e (patch)
tree36eb5bcb073567baa23064666ccfbbf771b92196 /arch/arm/mach-msm/include/mach/entry-macro.S
parentabd3ca51fba8bc200ae78e99bd1ac19c4e3b6781 (diff)
ARM: msm: convert SMP platforms to CONFIG_MULTI_IRQ_HANDLER
Convert the SMP msm platforms to be using the gic_handle_irq function as their primary interrupt handler. Tested-by: David Brown <davidb@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/mach-msm/include/mach/entry-macro.S')
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S27
1 files changed, 23 insertions, 4 deletions
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6..41f7003ef34 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
*
*/
-#if defined(CONFIG_ARM_GIC)
-#include <mach/entry-macro-qgic.S>
-#else
-#include <mach/entry-macro-vic.S>
+ .macro disable_fiq
+ .endm
+
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+
+#if !defined(CONFIG_ARM_GIC)
+#include <mach/msm_iomap.h>
+
+ .macro get_irqnr_preamble, base, tmp
+ @ enable imprecise aborts
+ cpsie a
+ mov \base, #MSM_VIC_BASE
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ @ 0xD0 has irq# or old irq# if the irq has been handled
+ @ 0xD4 has irq# or -1 if none pending *but* if you just
+ @ read 0xD4 you never get the first irq for some reason
+ ldr \irqnr, [\base, #0xD0]
+ ldr \irqnr, [\base, #0xD4]
+ cmp \irqnr, #0xffffffff
+ .endm
#endif