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authorArnd Bergmann <arnd@arndb.de>2011-07-28 15:25:46 +0000
committerArnd Bergmann <arnd@arndb.de>2011-07-28 15:25:46 +0000
commit6124a4e430b64d1577438c8648c59e996d02e73e (patch)
tree49cfafad785d1c9e403a5b0d755298b9af2c260f /arch/arm/mach-msm/platsmp.c
parent8e267f3da5f117d2f1316cf6ddf740f93f1c73aa (diff)
parent580975d7f48d7d047e22bb0f42adf7557801d8d4 (diff)
Merge branch 'imx/dt' into next/dt
Diffstat (limited to 'arch/arm/mach-msm/platsmp.c')
-rw-r--r--arch/arm/mach-msm/platsmp.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 315b9f36532..1a1af9e5625 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -18,6 +18,7 @@
#include <asm/hardware/gic.h>
#include <asm/cacheflush.h>
+#include <asm/cputype.h>
#include <asm/mach-types.h>
#include <mach/msm_iomap.h>
@@ -40,6 +41,12 @@ volatile int pen_release = -1;
static DEFINE_SPINLOCK(boot_lock);
+static inline int get_core_count(void)
+{
+ /* 1 + the PART[1:0] field of MIDR */
+ return ((read_cpuid_id() >> 4) & 3) + 1;
+}
+
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/* Configure edge-triggered PPIs */
@@ -147,9 +154,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
void __init smp_init_cpus(void)
{
- unsigned int i;
+ unsigned int i, ncores = get_core_count();
- for (i = 0; i < NR_CPUS; i++)
+ for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);